这些小活动你都参加了吗?快来围观一下吧!>>
电子产品世界 » 论坛首页 » 嵌入式开发 » FPGA » 【应用笔记】MAX II CPLD设计指南(MAX II CPLD Design

共2条 1/1 1 跳转至

【应用笔记】MAX II CPLD设计指南(MAX II CPLD Design Guidelines)

高工
2012-05-19 16:33:43     打赏
【应用笔记】MAX II CPLD设计指南(MAX II CPLD Design Guidelines)
由于CPLD(complex programmable logic devices)的灵活性、低功耗和低成本,更多的设计者在他们的系统设计中正在使用CPLD。
With the flexibility of complex programmable logic devices (CPLDs),
together with their low power consumption and low cost, more designers
are using CPLDs in their system design. Using MAX® II CPLDs in your
design can be very straightforward when you have some guidelines to
follow, even if you are not a frequent CPLD user. This application note
aims to provide the necessary guidelines on using MAX II devices in your
design, and help you avoid some of the problems users frequently face.an428.pdf



关键词: 应用     笔记     设计     指南     Design     Guidel    

菜鸟
2019-12-07 22:27:53     打赏
2楼

h


共2条 1/1 1 跳转至

回复

匿名不能发帖!请先 [ 登陆 注册 ]