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Z85C30 求救:Z85C30初始化
问
小弟使用Z85C30芯片进行HDLC协议通信,现在芯片的初始化不能通过,那位大哥使用过该芯片,帮帮小弟吧!
答 1:
85c30我已救了一个人,但不知是否救活?
我用85C30多年,现在遇到的问题是;
1)CRC与一般的不同,
2)传码先后不同
3)同步难解决
我可给你初始化程序
void sccinit(void) //Z85C30初始化
{
XBYTE[Scca]=0x09; //wr9 reset
XBYTE[Scca]=0xc0; //hardware reset
XBYTE[Scca]=0x09; //port A reset
XBYTE[Scca]=0x80;
XBYTE[Scca]=0x00; //wr0 set
XBYTE[Scca]=0x40; //Rx crc reset
XBYTE[Scca]=0x00; //wr0 set
XBYTE[Scca]=0x80; //Tx crc reset
XBYTE[Scca]=0x04; //wr4 set
XBYTE[Scca]=0x10; //sync
XBYTE[Scca]=0x01; //int mode
XBYTE[Scca]=0x00;
XBYTE[Scca]=0x02; //int vect
XBYTE[Scca]=0x40;
XBYTE[Scca]=0x03; //Rx set
XBYTE[Scca]=0xd0; //wr3 reset
XBYTE[Scca]=0x05; //Tx set wr5 reset
XBYTE[Scca]=0x60; //8bit no CRC pormis
XBYTE[Scca]=0x06; //sync word wr6
XBYTE[Scca]=0xab;
XBYTE[Scca]=0x07; //sync word WR7
XBYTE[Scca]=0xab;
XBYTE[Scca]=0x09; //WR9 prohibit aLL int
XBYTE[Scca]=0x00;
XBYTE[Scca]=0x09; //WR9 repeat two times
XBYTE[Scca]=0x00;
XBYTE[Scca]=0x0a; //wr10 set
XBYTE[Scca]=0x20; //20 NRZI mode
XBYTE[Scca]=0x0b; //wr11 set
XBYTE[Scca]=0x76; //TRxC=BR RX cLock=DPLL
XBYTE[Scca]=0x0c; //wr12 set
XBYTE[Scca]=0x3e; //2.4k bps
XBYTE[Scca]=0x0d; //wr13 set
XBYTE[Scca]=0x03; //2.4k bps
XBYTE[Scca]=0x0e; //wr14 reset
XBYTE[Scca]=0x22; //search mode
XBYTE[Scca]=0x0f; //wr15 reset
XBYTE[Scca]=0x10; //sync search
XBYTE[Scca]=0x0e; //wr14 set SCC enabLe
XBYTE[Scca]=0x23;
XBYTE[Scca]=0x03; //wr3 set
XBYTE[Scca]=0xd1; //Rx enabLe
XBYTE[Scca]=0x05; //wr3 set
XBYTE[Scca]=0x60; //tx enabLe 答 2: song9644 谢谢您不知道您用Z85C30做过HDLC通信没有,我现在调试不出,请您指教! 答 3: z我没说清楚,CRC 就是HDLC方式下的校验码.与标准CRC有所不同,如两端均用Z85C30,则无问题,如与其它产品对接,调式较难.
我用85C30多年,现在遇到的问题是;
1)CRC与一般的不同,
2)传码先后不同
3)同步难解决
我可给你初始化程序
void sccinit(void) //Z85C30初始化
{
XBYTE[Scca]=0x09; //wr9 reset
XBYTE[Scca]=0xc0; //hardware reset
XBYTE[Scca]=0x09; //port A reset
XBYTE[Scca]=0x80;
XBYTE[Scca]=0x00; //wr0 set
XBYTE[Scca]=0x40; //Rx crc reset
XBYTE[Scca]=0x00; //wr0 set
XBYTE[Scca]=0x80; //Tx crc reset
XBYTE[Scca]=0x04; //wr4 set
XBYTE[Scca]=0x10; //sync
XBYTE[Scca]=0x01; //int mode
XBYTE[Scca]=0x00;
XBYTE[Scca]=0x02; //int vect
XBYTE[Scca]=0x40;
XBYTE[Scca]=0x03; //Rx set
XBYTE[Scca]=0xd0; //wr3 reset
XBYTE[Scca]=0x05; //Tx set wr5 reset
XBYTE[Scca]=0x60; //8bit no CRC pormis
XBYTE[Scca]=0x06; //sync word wr6
XBYTE[Scca]=0xab;
XBYTE[Scca]=0x07; //sync word WR7
XBYTE[Scca]=0xab;
XBYTE[Scca]=0x09; //WR9 prohibit aLL int
XBYTE[Scca]=0x00;
XBYTE[Scca]=0x09; //WR9 repeat two times
XBYTE[Scca]=0x00;
XBYTE[Scca]=0x0a; //wr10 set
XBYTE[Scca]=0x20; //20 NRZI mode
XBYTE[Scca]=0x0b; //wr11 set
XBYTE[Scca]=0x76; //TRxC=BR RX cLock=DPLL
XBYTE[Scca]=0x0c; //wr12 set
XBYTE[Scca]=0x3e; //2.4k bps
XBYTE[Scca]=0x0d; //wr13 set
XBYTE[Scca]=0x03; //2.4k bps
XBYTE[Scca]=0x0e; //wr14 reset
XBYTE[Scca]=0x22; //search mode
XBYTE[Scca]=0x0f; //wr15 reset
XBYTE[Scca]=0x10; //sync search
XBYTE[Scca]=0x0e; //wr14 set SCC enabLe
XBYTE[Scca]=0x23;
XBYTE[Scca]=0x03; //wr3 set
XBYTE[Scca]=0xd1; //Rx enabLe
XBYTE[Scca]=0x05; //wr3 set
XBYTE[Scca]=0x60; //tx enabLe 答 2: song9644 谢谢您不知道您用Z85C30做过HDLC通信没有,我现在调试不出,请您指教! 答 3: z我没说清楚,CRC 就是HDLC方式下的校验码.与标准CRC有所不同,如两端均用Z85C30,则无问题,如与其它产品对接,调式较难.
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