module fsm(I,clock,reset,out); input I,clock,reset; output [2:0] out; reg [2:0] out; reg [2:0] currentState,nextState; parameter [2:0] A=0, // The state labels and their assignments B=1, C=2, D=3, E=4, F=5; always@(I or currentState) // The state labels and their logic case (currentState) A: begin nextState=(I==0)?A:B; out=(I==0)?3’b000:3’b100; end B: begin nextState=(I==0)?A:C; out=(I==0)?3’b000:3’b100; end C: begin nextState=(I==0)?A:D; out=(I==0)?3’b000:3’b101; end D: begin nextState=(I==0)?D:F; out=(I==0)?3’b010:3’b110; end E: begin nextState=(I==0)?D:F; out=(I==0)?3’b010:3’b110; end F:begin nextState=D; out=(I==0)?3’b000:3’b101; end default: begin // oops,undefined ststes.Go to state A nextState=A; out=(I==0)?3’bxxx:3’bxxx; end endcase always@(posedge clock or negedge reset) // The state register if(~reset) currentState<=A; else currentState<=nextState; endmodule |
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接触认识状态机

简单FSM示例
可以作为以后写的一个模板哦!![em07][em07]
关键词: 接触 认识 状态机
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