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小菜鸟刚刚上路……求回答……我用Quartus中自带的向导建立了一个双端口RAM的IP核，打开它的verilog文件发现读不懂啊……更不知道如何在主模块中调用了……小弟新手啊……求指点啊！！！ `timescale 1 ps / 1 ps // synopsys translate_on module ram ( byteena_a, data, rdaddress, rdclock, rden, wraddress, wrclock, wren, q); input [0:0] byteena_a; input [7:0] data; input [1:0] rdaddress; input rdclock; input rden; input [1:0] wraddress; input wrclock; input wren; output [7:0] q; `ifndef ALTERA_RESERVED_QIS // synopsys translate_off `endif tri1 [0:0] byteena_a; tri1 rden; tri1 wren; `ifndef ALTERA_RESERVED_QIS // synopsys translate_on `endif wire [7:0] sub_wire0; wire [7:0] q = sub_wire0[7:0]; altsyncram altsyncram_component ( .wren_a (wren), .clock0 (wrclock), .clock1 (rdclock), .byteena_a (byteena_a), .address_a (wraddress), .address_b (rdaddress), .rden_b (rden), .data_a (data), .q_b (sub_wire0), .aclr0 (1'b0), .aclr1 (1'b0), .addressstall_a (1'b0), .addressstall_b (1'b0), .byteena_b (1'b1), .clocken0 (1'b1), .clocken1 (1'b1), .clocken2 (1'b1), .clocken3 (1'b1), .data_b ({8{1'b1}}), .eccstatus (), .q_a (), .rden_a (1'b1), .wren_b (1'b0)); defparam altsyncram_component.address_aclr_b = "NONE", altsyncram_component.address_reg_b = "CLOCK1", altsyncram_component.byte_size = 8, altsyncram_component.clock_enable_input_a = "BYPASS", altsyncram_component.clock_enable_input_b = "BYPASS", altsyncram_component.clock_enable_output_b = "BYPASS", altsyncram_component.intended_device_family = "Cyclone III", altsyncram_component.lpm_type = "altsyncram", altsyncram_component.maximum_depth = 128, altsyncram_component.numwords_a = 4, altsyncram_component.numwords_b = 4, altsyncram_component.operation_mode = "DUAL_PORT", altsyncram_component.outdata_aclr_b = "NONE", altsyncram_component.outdata_reg_b = "CLOCK1", altsyncram_component.power_up_uninitialized = "FALSE", altsyncram_component.rdcontrol_reg_b = "CLOCK1", altsyncram_component.widthad_a = 2, altsyncram_component.widthad_b = 2, altsyncram_component.width_a = 8, altsyncram_component.width_b = 8, altsyncram_component.width_byteena_a = 1; endmodule 这里的altsyncram altsyncram_component是调用的其他的函数或者任务或者模块或者库么？求详细指点啊！！