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摘要：

In this paper, an audio coprocessor architecture is discussed for low power applications like portable audio players and music playback features in cellular phones. The architectural details are split into hardware and software domains. The audio coprocessor hardware consists of a bitstream processor to handle parsing, buffering and control, and an arithmetic unit to handle math intensive operations. Additionally, the hardware contains peripherals, memory modules and interfaces like ports, DMA, RAM/ROM and a Inter-IC sound interface. The use of hardware features and capabilities is illustrated with an MPEG1 Layer 3 decoder as an example.

文档：spraaw3.pdf

链接：http://www.ti.com.cn/general/cn/docs/litabsmultiplefilelist.tsp?literatureNumber=spraaw3