This application note describes how to interface 3.3V differential Low-Voltage Positive Emitter Coupled Logic (LVPECL) drivers with Xilinx® 2.5V differential receivers, including Virtex®-II Pro, Virtex-II Pro X, Virtex-4, Virtex-5, Spartan®-3E, and Spartan-3 FPGA 2.5V LVPECL and Low Voltage Differential Signaling (LVDS). Several interface modifications are presented with supporting IBIS simulation results.
xapp696.pdf
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关于LVPECL 3.3 V驱动器与Xilinx 2.5 V差分接收器接口问题

关键词: 关于 LVPECL 驱动器 Xilinx 差分 接
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