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用了四个按键来控制VGA显示不同的彩条，每按一个按键，如果按下了，相应VGA显示不同的彩条，且对应相应的led亮。。现在按键按下，没反应，不知问题出现在哪？？

//这个是顶层模块
module 	my_vga(
   clk,rst_n,
   key4_n,key3_n,key2_n,key1_n,
	led,
   disp_RGB,
   hsync,
   vsync
);
input  clk,rst_n;     //系统输入时钟 50MHz
input  key4_n,key3_n,key2_n,key1_n;//
output [3:0]led;
output [2:0]disp_RGB;    //VGA数据输出
output  hsync;     //VGA列同步信号
output  vsync;     //VGA行同步信号

wire inclk0,c0;
wire vga_clk;
wire [3:0]key_switch;
//倍频40MHz
VGA_PLL 	 	U1(
					 .inclk0(clk),
					 .c0(vga_clk)
					);

		 
vga_key     U2(
				 .vga_clk(vga_clk),
				 .rst_n(rst_n),
				 .key4_n(key4_n),
				 .key3_n(key3_n),
				 .key2_n(key2_n),
				 .key1_n(key1_n),// input
				 .key_switch(key_switch)//output 
				 );
				 
			 
vga_control   U3(
					.vga_clk(vga_clk),
					.rst_n(rst_n),
					.key_switch(key_switch),
					.disp_RGB(disp_RGB),
					.led(led),
					.hsync(hsync),
					.vsync(vsync)
				);
endmodule

 //

//按键消抖模块
module  vga_key(
					input vga_clk,rst_n,
					input key1_n,
					input key2_n,
					input key3_n,
					input key4_n,
					output [3:0]key_switch
					);
//---------------------------------------------------------------------------
reg[3:0] key_rst;  //每来一个时钟上升沿都会把3个按键的值锁存到key_rst寄存器中

always @(posedge vga_clk  or negedge rst_n)
    if (!rst_n) key_rst <= 4'b1111;
    else key_rst <= {key4_n,key3_n,key2_n,key1_n};

reg[3:0] key_rst_r;       //每个时钟周期的上升沿将key_rst信号锁存到key_rst_r中

always @ ( posedge vga_clk  or negedge rst_n)
    if (!rst_n) key_rst_r <= 4'b1111;
    else key_rst_r <= key_rst;
 //


wire [3:0] key_an = key_rst_r & ( ~key_rst);//--|__  下升沿  判断

//wire [3:0] key_an = ~key_rst_r & (key_rst);//上
//---------------------------------------------------------------------------

reg[19:0]  cnt;	//计数寄存器

always @ (posedge vga_clk  or negedge rst_n)
    if (!rst_n) cnt <= 20'd0;	//异步复位
	 else if(key_an) cnt <=20'd0;
    else cnt <= cnt + 1'b1;
  
reg[3:0] low_sw;

always @(posedge vga_clk  or negedge rst_n)
    if (!rst_n) low_sw <= 4'b1111;
    else if (cnt == 20'd800_000) 	//满20ms，锁存按键值
      low_sw <= {key4_n,key3_n,key2_n,key1_n};
       
always @ ( posedge vga_clk  or negedge rst_n )
    if (!rst_n) low_sw_r <= 4'b1111;
    else low_sw_r <= low_sw;
   
assign key_switch = low_sw_r[3:0] & ( ~low_sw[3:0]);
endmodule

//VGA控制模块
module vga_control(
				vga_clk,
				rst_n,
				key_switch,				
				disp_RGB,
				led,
				hsync,
				vsync
				);
input  vga_clk,rst_n;     //系统输入时钟 40MHz
input  [3:0]key_switch;
//input key1_n;
output [3:0]led;
output [2:0]disp_RGB;    //VGA数据输出
output  hsync;     //VGA列同步信号
output  vsync;     //VGA行同步信号

reg [10:0]   hcount;     //VGA列扫描计数器
reg [10:0]   vcount;     //VGA行扫描计数器
reg [2:0]   data;
reg [2:0]   h_dat;
reg [2:0]   v_dat;
reg [3:0]	led_r;
wire  hcount_ov;
wire  vcount_ov;
wire  dat_act;
wire  hsync;
wire  vsync;

//VGA列、行扫描时序参数表
parameter   hsync_end   = 11'd128,
				hdat_begin  = 11'd216,
				hdat_end    = 11'd1016,
				hcolumn_end  = 11'd1056,
				
				vsync_end   = 11'd4,
				vdat_begin  = 11'd27,
				vdat_end    = 11'd627,
				vline_end   = 11'd628;

//************************VGA驱动部分******************************* 
//列扫描     
always @(posedge vga_clk or negedge rst_n )
begin
	 if(!rst_n) 			hcount <= 11'd0;
	 else if(hcount_ov)	hcount <= 11'd0;
	 else 					hcount <= hcount + 11'd1;
end
assign hcount_ov = (hcount == hcolumn_end);//1056列扫描完,也就是一行扫描完
//******************************************************************
//行扫描
always @(posedge vga_clk or negedge rst_n)
begin
	if(!rst_n)		vcount <= 11'd0;
	else if (hcount_ov)
		 begin
			if (vcount_ov) vcount <= 11'd0;
		   else           vcount <= vcount + 11'd1;
		 end
end
assign  vcount_ov = (vcount == vline_end);//全行扫描完

//数据、同步信号输
assign dat_act =((hcount > hdat_begin) && (hcount < hdat_end))
     && ((vcount > vdat_begin) && (vcount < vdat_end));
assign hsync = (hcount > hsync_end);
assign vsync = (vcount > vsync_end);

always @(posedge vga_clk or negedge rst_n)  //产生竖彩条
begin
	 if(!rst_n)					v_dat <= 3'h1;  
	 else if(hcount < 223) 	v_dat <= 3'h7;   //白   
	 else if(hcount < 303) 	v_dat <= 3'h6;   //黄
	 else if(hcount < 383) 	v_dat <= 3'h5;   //青
	 else if(hcount < 463) 	v_dat <= 3'h4;   //绿
	 else if(hcount < 543)	v_dat <= 3'h3;   //紫
	 else if(hcount < 623)  v_dat <= 3'h2;   //红
	 else if(hcount < 703) 	v_dat <= 3'h1;   //蓝
	 else  						v_dat <= 3'h0;   //黑
end

always @(posedge vga_clk or negedge rst_n)  //产生横彩条
begin
	 if(!rst_n)					h_dat <= 3'h1;   //黑
	 else if(vcount < 94) 	h_dat <= 3'h7;   //白
	 else if(vcount < 154)	h_dat <= 3'h6;   //黄
 
	 else if(vcount < 214) 	h_dat <= 3'h5;   //青
	 else if(vcount < 274) 	h_dat <= 3'h4;   //绿
	 else if(vcount < 334) 	h_dat <= 3'h3;   //紫
	 else if(vcount < 394)	h_dat <= 3'h2;   //红
	 else if(vcount < 454)	h_dat <= 3'h1;   //蓝
	 else 						h_dat <= 3'h0;   //黑
end
  
//************************显示数据处理部分******************************* 

always @(posedge vga_clk or negedge rst_n)
begin
	if(!rst_n)begin data <=3'b001;led_r<=4'b1111;end
	else 
		case(key_switch)//按键没反应???????
		4'b0001: begin data <= h_dat;  led_r<=4'b1110;end    //选择横彩条
		4'b0010: begin data <= v_dat;  led_r<=4'b1101;end     //选择竖彩条
		4'b0100: begin data <= (v_dat ^ h_dat);led_r<=4'b1011;end //产生棋盘格
		4'b1000: begin data <= (v_dat ~^ h_dat);led_r<=4'b0111;end //产生棋盘格
		default:begin data <=3'b001;led_r<=4'b1100;end
		endcase
end

assign disp_RGB = (dat_act) ?  data : 3'd0;   
assign led=led_r;

endmodule