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板子拿到很久了，可是一直没有时间发帖。。。

之前也是尝试过点灯，可是一直行不通，最后查找硬件和软件问题。

问题分析后，是IO设置的问题，应该设置成推挽输出。（由于之前一直没时间，所以直到今天才重启拿起来试试）

外部STLink的MCO是有输出的，但是我这里是用的HSI。

在主函数while循环中添加断点，单步调试就可以控制LED等的亮灭。

下面贴出代码。

main.c

#include "stm32l0xx.h"
#include "sys.h"
#include "led.h"

int main(void)
{
  SystemCoreClockConfigure(); 
  SystemCoreClockUpdate();
	led_init();
	while(1)
	{
		GPIOA->BSRR = 1 << 5; GPIOA->BRR = 1 << 5; } } 

led.c

#include "led.h"

int 
	led_init(void)
{
	//PA5
	RCC->IOPENR |= 0x0001;
	
	GPIOA->MODER &= ~(0x3 << 10); GPIOA->MODER |= 0x1 << 10; GPIOA->OTYPER &= ~(0x1 << 5); GPIOA->OSPEEDR |= 0x3 << 10; GPIOA->PUPDR &= ~(0x3 << 10); return 0; } 

sys.c

#include "sys.h"

/*----------------------------------------------------------------------------
 * SystemCoreClockConfigure: configure SystemCoreClock using HSI
 *----------------------------------------------------------------------------*/
void 
	SystemCoreClockConfigure(void) 
{
  RCC->CR |= ((uint32_t)RCC_CR_HSION);                     // Enable HSI
  while ((RCC->CR & RCC_CR_HSIRDY) == 0);                  // Wait for HSI Ready

  RCC->CFGR = RCC_CFGR_SW_HSI;                             // HSI is system clock
  while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI);  // Wait for HSI used as system clock

  // PLL configuration: PLLCLK = (HSI * 4)/2 = 32 MHz
  RCC->CFGR &= ~(RCC_CFGR_PLLSRC |
                 RCC_CFGR_PLLMUL |
                 RCC_CFGR_PLLDIV  );
  RCC->CFGR |=  (RCC_CFGR_PLLSRC_HSI |
                 RCC_CFGR_PLLMUL4    |
                 RCC_CFGR_PLLDIV2     );

  FLASH->ACR |= FLASH_ACR_PRFTEN;                          // Enable Prefetch Buffer
  FLASH->ACR |= FLASH_ACR_LATENCY;                         // Flash 1 wait state

  RCC->APB1ENR |= RCC_APB1ENR_PWREN;                       // Enable the PWR APB1 Clock
  PWR->CR = PWR_CR_VOS_0;                                  // Select the Voltage Range 1 (1.8V)
  while((PWR->CSR & PWR_CSR_VOSF) != 0);                   // Wait for Voltage Regulator Ready

  RCC->CFGR |= RCC_CFGR_HPRE_DIV1;                         // HCLK = SYSCLK
  RCC->CFGR |= RCC_CFGR_PPRE1_DIV1;                        // PCLK1 = HCLK
  RCC->CFGR |= RCC_CFGR_PPRE2_DIV1;                        // PCLK2 = HCLK

  RCC->CR &= ~RCC_CR_PLLON;                                // Disable PLL

  RCC->CR |= RCC_CR_PLLON;                                 // Enable PLL
  while((RCC->CR & RCC_CR_PLLRDY) == 0) __NOP();           // Wait till PLL is ready

  RCC->CFGR &= ~RCC_CFGR_SW;                               // Select PLL as system clock source
  RCC->CFGR |=  RCC_CFGR_SW_PLL;
  while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL);  // Wait till PLL is system clock src
}

MDK寄存器版模板见如下附件

led.rar