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仿真器无法连接,怎么办

助工
2013-10-26 00:38:49     打赏

 仿真器无法连接,出现错误如贴中3楼所示,猛击:http://forum.eepw.com.cn/thread/240803/1 

仿真器是直接买的焊接好的并测试好的,怎么会无法连接呢?是不是要调启动模式才行?


助工
2013-10-26 23:38:36     打赏
2楼

下面是我的test connection测试文件,开发板上电,显示的是成功,然后尝试仿真,可是仿真的时候连接不了目标

[Start]

Execute the command:
%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity
[Result]
-----[Print the board config pathname(s)]------------------------------------
C:\Users\ADMINI~1\AppData\Local\.TI\1293449947\
    0\0\BrdDat\testBoard.dat
-----[Print the reset-command software log-file]-----------------------------
This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioserdesusb.dll'.
The library build date was 'May 30 2012'.
The library build time was '22:52:27'.
The library package version is '5.0.747.0'.
The library component version is '35.34.40.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.
-----[Print the reset-command hardware log-file]-----------------------------
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).
-----[The log-file for the JTAG TCLK output generated from the PLL]----------
There is no hardware for programming the JTAG TCLK frequency.
-----[Measure the source and frequency of the final JTAG TCLKR input]--------
There is no hardware for measuring the JTAG TCLK frequency.
-----[Perform the standard path-length test on the JTAG IR and DR]-----------
This path-length test uses blocks of 512 32-bit words.
The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 3 bits.
The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.
-----[Perform the Integrity scan-test on the JTAG IR]------------------------
This test will use blocks of 512 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG IR Integrity scan-test has succeeded.
-----[Perform the Integrity scan-test on the JTAG DR]------------------------
This test will use blocks of 512 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG DR Integrity scan-test has succeeded.

[End]

-----------------------------------------我是分隔符-----------------------------------------

下面是开发板断电时的test connection测试结果,很显然失败了

[Start]
Execute the command:
%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity
[Result]
-----[Print the board config pathname(s)]------------------------------------
C:\Users\ADMINI~1\AppData\Local\.TI\1293449947\
    0\0\BrdDat\testBoard.dat
-----[Print the reset-command software log-file]-----------------------------
This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioserdesusb.dll'.
The library build date was 'May 30 2012'.
The library build time was '22:52:27'.
The library package version is '5.0.747.0'.
The library component version is '35.34.40.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.
-----[Print the reset-command hardware log-file]-----------------------------
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).
-----[The log-file for the JTAG TCLK output generated from the PLL]----------
There is no hardware for programming the JTAG TCLK frequency.
-----[Measure the source and frequency of the final JTAG TCLKR input]--------
There is no hardware for measuring the JTAG TCLK frequency.
-----[Perform the standard path-length test on the JTAG IR and DR]-----------
This path-length test uses blocks of 512 32-bit words.
The test for the JTAG IR instruction path-length failed.
The JTAG IR instruction scan-path is stuck-at-zero.
The test for the JTAG DR bypass path-length failed.
The JTAG DR bypass scan-path is stuck-at-zero.
-----[Perform the Integrity scan-test on the JTAG IR]------------------------
This test will use blocks of 512 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Test 1 Word 0: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 1: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 2: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 3: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 4: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 5: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 6: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 7: scanned out 0xFFFFFFFF and scanned in 0x00000000.
The details of the first 8 errors have been provided.
The utility will now report only the count of failed tests.
Scan tests: 1, skipped: 0, failed: 1
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 1
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 2
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 3
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 4
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 5
Some of the values were corrupted - 83.3 percent.
The JTAG IR Integrity scan-test has failed.
-----[Perform the Integrity scan-test on the JTAG DR]------------------------
This test will use blocks of 512 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Test 1 Word 0: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 1: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 2: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 3: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 4: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 5: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 6: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 7: scanned out 0xFFFFFFFF and scanned in 0x00000000.
The details of the first 8 errors have been provided.
The utility will now report only the count of failed tests.
Scan tests: 1, skipped: 0, failed: 1
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 1
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 2
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 3
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 4
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 5
Some of the values were corrupted - 83.3 percent.
The JTAG DR Integrity scan-test has failed.
[End]


助工
2013-10-26 23:49:37     打赏
3楼

嗯嗯,我检查了板子,只发现晶振出焊接有点小问题,可是焊好以后还是不能连接dsp,并且我点击了test connection,出现楼上所示的输出,我将传输速率减小到100kHz和增大到2MHz仿真都不能连接,test connection的结果和楼上的一样,现在苦于找不到测试dsp好坏的方法,那个板子上的流水灯是cpld的,dsp不好测。

另外我测量了电源的电压,P1是3.3V,P2设计电压为1.9V,实测为1.919V,可能是由于电阻的误差引起的,这电源有问题吗?


助工
2013-10-26 23:51:16     打赏
4楼

如9楼所示,这算通过测试了吗?提示了成功可是还是连接不上,主要出现如下错误:

C28xx: Error connecting to the target: (Error -1135 @ 0x0) The emulator reported an error. Confirm emulator configuration and connections, reset the emulator, and retry the operation. (Emulation package 5.0.747.0) 
C28xx: Error connecting to the target: (Error -1041 @ 0xFFFFFF87) The emulator reported an error. Confirm emulator configuration and connections, reset the emulator, and retry the operation. (Emulation package 5.0.747.0)
有时是上面的,有时是下面的,我已经把连接速度将为100kHz了,可还是出错,无法连接


助工
2013-10-26 23:56:12     打赏
5楼
版主,现在苦于找不到测试dsp好坏的方法,那个板子上的流水灯是cpld的,dsp里有没有烧写测试程序?如果有效果是什么?snake0301在贴中http://forum.eepw.com.cn/thread/239911/1提到:SCI-A相关的端口被MAX-II复用了,串口烧写Flash暂时没办法解决了。还有什么办法能够测试dsp的好坏吗?

助工
2013-10-27 00:11:19     打赏
6楼
我也怀疑是不是dsp芯片的问题,因为那个流水灯是cpld的,只能说明cpld是好的,dsp我还不知道如何测试,得再看看书了

助工
2013-10-27 10:15:50     打赏
7楼
赞一个,现在先不用急,等我把那个散件也焊好然后测试如果还是无法连接再说。还有这个无法连接有可能是dsp的问题,那个流水灯闪只能说明cpld是好的,dsp是不是好的还是未知的。还不知道如何测试。还有可能是开发环境的问题,网上有帖子说xds100v1可以连接28035,2808,但无法调试2812,他使用的开发环境是CCS3.3.83.20。还有也有可能是仿真设置的问题,总之先等一等,看看书再说吧。

助工
2013-10-27 10:19:47     打赏
8楼
原来那个缺了的引脚是用来防止接反啊,这样我去借一个好的仿真器来测试一下,看看行不行。

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