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Intel公司的EP80579是用于嵌入式计算的完整的片上系统(SOC),主要用于通信,存储和基于Intel架构的嵌入式设计. 和分立的多片式解决方案相比,EP80579在处理效率,占位面积以及成本效益等方面提供了杰出的组合. EP80579包括基于Intel Pentium M处理器的Intel架构,存储器控制器集线器,I/O控制器集线器以及各种便于设计的I/O,包括PCI Express,吉比特以太网,用于TDM或模拟语音连接的高速串行口, 用于总体加密的安全加速器, 散列法(hashing)以及公/私密匙的生成与数据通路加速.本文介绍了EP80579 SOC处理器的主要特性和优势, 方框图以及具有Intel QuickAssist 技术的EP80579处理器方框图, EP80579开发板的主要特性及其方框图.

Intel® EP80579 Integrated Processor for Embedded Computing Complete System-on-a-Chip for Communications, Storage and Embedded Designs Based on Intel® architecture, the Intel® EP80579 Integrated Processor is among the first in a series of breakthrough system on-a-chip (SOC) processors, delivering excellent performanceper-
watt for small form factor designs in communications,storage and embedded applications. This fully pin-compatible product line also includes the Intel® EP80579 Integrated
Processor with Intel® QuickAssist Technology.

This SOC processor delivers a significant leap in architectural design, providing an outstanding combination of performance, power efficiency, footprint savings and cost-effectiveness compared to discrete, multi-chip solutions. Featuring embedded
lifecycle support, it is ideal for a wide range of applications such as small-to-medium business (SMB) and enterprise communications equipment, transaction terminals, interactive clients, print and imaging applications, access applications, SMB and home network attached storage, and industrial automation applications.
This single-chip design includes an Intel architecture complex based on the Intel® Pentium® M processor, integrated memory controller hub, integrated I/O controller hub, and flexible integrated I/O support with three Ethernet MACs, two Controller Area
Network (CAN) interfaces and a local expansion bus interface. The Intel EP80579 Integrated Processor includes multiple product offerings with a range of core speeds and thermal design power (TDP),1 along with an industrial temperature option ideal for communications and industrial automation solutions in unconstrained thermal  environments. The processor is software-compatible with previous members of the Intel
microprocessor family, enabling smooth migration for current x86 developments.

The Intel EP80579 Integrated Processor is available in a 1,088-ball Flip Chip BGA package and includes a wide range of integrated I/O for flexible design options:

Three 10/100/1000 Ethernet MACs supporting RGMII or RMII and Management Data Input/Output (MDIO)
PCI Express* root complex interface in 1x8, 2x4 or 2x1 configurations
Two USB (1.1 or 2.0) interfaces
Two SATA (Gen1 or Gen2) interfaces
36 General Purpose I/O (GPIO) ports
Two CAN 2.0b interfaces
One synchronous serial port (SSP)
One local expansion bus for general control or expanded peripheral connections
Two 16550-compatible UARTs
Two System Management Bus (SMBus)/I2C interfaces
One Low Pin Count (LPC 1.1) interface
One Serial Peripheral Interface (SPI) boot interface



EP80579主要特性:
System on a Chip (SoC)
—Integrated Intel® Architecture (IA) processor and chipset (MCH/ICH) technology
—Extensive integration of standard Intel architecture communications interfaces provide cost, power and board area savings (Gigabit Ethernet (GbE), Time Division Multiplexing (TDM) processing, Security Services Unit (SSU), and Acceleration Services Units (ASU))
SKU Support1
—Embedded: Intel architecture compatibility and high-speed interfaces (GbEs, PCI
Express*)
—Application Services: Security — Packet security compatibility and IP Telephony packet security, TDM, and High-Level Data Link Control (HDLC)
Intel Architecture Processor
—Low-power and high-performance architecture based on Intel Architecture (IA-32) processor
—Three operating frequency SKUs:
-600 MHz, 1066 MHz, or 1200 MHz
—256 KB L2 data coherent cache (2 way)
Integrated Memory Control Hub (IMCH) and Integrated I/O Control Hub (IICH) Compatible
—Enhanced DMA (EDMA) controller
—Two SATA Gen1 or Gen2 interfaces
—Two USB 1.1 or USB 2.0 ports
—Two integrated, 16550-compatible UARTs
—LPC 1.1 interface
—Serial Peripheral Interface (SPI)
—Two SMBus 2.0 compliant interfaces
—GPIOs
—Watchdog Timer
—One 32/64-bit and two 32-bit high-precision event timers
Acceleration Services Unit (ASU)
—High performance accelerator on-chip engines for packet processing
—Support capabilities for commonly used protocol implementations such as TCP/IP, UDP, IPSec, SSL, NAT, and SRTP
Security Services Unit (SSU)
—High-performance on-chip Crypto Accelerator
—Support capabilities for commonly used cryptographic protocol implementations
Single-Channel Double-Data-Rate (DDR) SDRAM Memory
—Supports DDR2 at 400/533/667/800 MT/s
—Supports 32 or 64-bit interfaces
—Error correction code (ECC); single-bit correct/ double-bit detect (SEC/DED) coverage
—Addressable from Intel architecture processor and PCI Express
Three Gigabit Ethernet MACs
—Three 10/100/1000 ports with RGMII/RMII interfaces
—MDIO interface for external PHY configuration
—Serial EEPROM interface supports network boot and wake-on LAN
Industry Standard PCI Express Interface
—Supports 1x8, 2x4, or 2x1 configurations as a root complex
Integrated Serial ATA (SATA) Host Controllers
—Independent DMA operation on two ports
—Data transfer rates up to 3.0 Gb/s
—Alternate Device ID
Integrated High-speed Serial Interface (TDM)
—Supports up to 12 external T1/E1 and codecs
—Supports up to 128 HDLC channels
Local Expansion Bus (LEB)
—Supports up to eight chip select external slaves (one of which can be a master)
—25-bit address and 16-bit data
—Supports HPI-8 and HPI-16
Dual Controller Area Network (CAN)
—Supports two CAN 2.0b interfaces
Single Synchronous Serial Port (SSP) Compatible
IEEE 1588-2008 Hardware Assistance
—Supports two GbE and two CAN interfaces
—Time master/target support
1088-Ball FCBGA package
—Dimensions of 37.5 mm x 37.5 mm
—1.092-mm solder ball pitch
—Lead-free only — RoHS compliant
Typical Applications
—Embedded, Security and/or IP Telephony applications


图1. EP80579方框图