摘要：本文提供了可以挂接两个或更多数字器件进行通信的串行接口的关键特性。设计工程师可以利用本文给出的表格对各种接口进行比较，根据具体的应用条件，如：信号线数、网络尺寸、速度、距离、抗干扰能力、故障容限和可靠性等，选择适当的接口标准。
Dallas Semiconductor提供1-Wire®串口协议，用于构建低成本、连线最少的方案。这种廉价的主/从结构可以利用其数字通信线提供从器件的电源。利用软件，通过微控制器单元(MCU)的一个I/O引脚即可构成1-Wire主机。我们还提供I²C、UART (RS-232)或USB至1-Wire的桥接电路，在远距离负载的应用中实现1-Wire通信协议，并对1-Wire波形进行优化。
| 1-Wire | I²C | SMBus™ | SPI™ | MicroWire/PLUS™ | M-Bus (EN1434) | CAN (ISO11898) | LIN Bus | |
| Network Concept | single master, multiple slaves | multiple masters, multiple slaves | multiple masters, multiple slaves | single master, multiple slaves | single master, multiple slaves | single master, multiple slaves | multiple masters, multiple slaves | single master, multiple slaves |
| Number of Signal Lines | 1 (IO) | 2, (SCL, SDA) | 2, (SMBCLK, SMBDAT) | 4, (active-low CS, SI, SO, SCK) | 4, (active-low CS, DI, DO, SK) | 2 (lines can be swapped) | 2 (CAN_H, CAN_L, terminated) | 1 (LIN) |
| Optional signals | N/A | N/A | SMBSUS#, SMBALERT# | N/A | N/A | N/A | 2nd GND, Power, Shield | N/A |
| Network Size | Up to 300 m (with suitable master circuit) | Limited by max. 400pF bus capacitance requirement | Limited by max. 400pF bus capacitance requirement | N/A (circuit board level) | N/A (circuit board level) | Max. 350m per segment of max. 250 slaves; max. 180nF | 40m @1M bps1000m @ 50k bps (example) | Up to 40m, max. 10nF total load |
| Network Interface | open drain, resistive or active master pull-up | open drain, resistive or active master pull-up | open drain, resistive or active master pull-up | Push-pull with tristate | Push-pull with tristate | M to S: voltage drive S to M: current load |
Differential open drain/source or open coll./emitter | open drain, resistive master pull-up |
| Network Voltage | From 2.8 to 6.0 V, device specific | From 1.8 to 5.5V, device specific | 2.7V to 5.5V | From 1.8V to 5.5V, device specific | From 1.8V to 5.5V, device specific | ~40V | VDD-VD (diode drop); ~4.5V max. | 8 to 18V |
| Logic Thresholds | Vary with network voltage | Fixed level: >1.5V, >3.0 V VDD-related level: <30%, >70% of VDD | <0.8V, >2.1V | VDD-related level: <20% (30%), >70% of VDD (inconsistent) | Fixed level: <0.8V, >2.0V; VDD-related level: <20% (30%), >70% (80%) of VDD (inconsistent) | Master to slave: 24V, 36V nominalSlave to master: <1.5mA, >11mA | Differential: <50mV (recessive), >1.5V (dominant); driver specification | VDD-related level: <20%, >80% of VDD (driver spec.)<40%, >60% of VDD (receiver spec.) |
| Transmission | LS bit first, half-duplex | MS bit first plus Acknowledge bit, half-duplex | MS bit first plus Acknowledge bit, half-duplex | MS bit first, full-duplex | MS bit first, full-duplex | LS bit first, half-duplex, acknowledge response | MS bit first, half-duplex | LS bit first, half-duplex |
| Address Format | 56 bits | 7 bits, (10 bits defined but not implemented) | 7 bits, (10 bits defined but not implemented) | N/A | N/A | 8 bits (primary address), 64 bits (secondary address) | Message identifier 11 bits (standard format), 29 bits (extended format) | Message identifier 8 bits, including 2 parity bits |
| Network Inventory | Automatic, supports dynamic topology change | N/A; slave addresses hard-coded in firmware | ARP, Address Resolution Protocol (Rev. 2.0 only) | N/A; slave select (active-low CS) hard-coded in firmware | N/A; slave select (active-low CS) hard-coded in firmware | Automatic | N/A; message-based protocol, not address based | N/A; message-based protocol, not address based |
| Gross Data Rate | Standard: ~0 to 16.3k bps Overdrive: ~0 to 142k bps) | Standard: ~0 to 100k bps; Fast: ~0 to 400k bps; High-Speed: ~0 to 3.4M bps | 10k to 100k bps | ~0 to ~10 M bps (device specific) | ~0 to ~5 M bps (device specific) | 300, 2400, 9600 bps | ~0 to 1M bps | ~1k to ~20k bps |
| Access Time | Standard: ~ 5.4ms Overdrive: ~0.6ms (at maximum speed) | Standard: ~95µsFast: ~23µs(at maximum speed) | ~95µs @ 100k bps | N/A | N/A | Primary address, 2400 bps: 13.75ms (short frame), 27.5ms (long frame) | At 1M bps 19µs (standard) or 39µs (extended) from start of frame to 1st data bit | At 20k bps 1.7ms from start of frame to 1st data bit |
| Data Protection | 8-bit and 16-bit CRC | N/A | PEC Packet Error Code (Rev.1.1, 2.0) | N/A | N/A | Even parity, check sum, frames | 15-bit CRC, frames, frame acknowledge | Check sum, frames |
| Collision Detection | Yes, through non-matching CRC | Yes (multi-master operation only) | Yes (Rev. 2.0 only) | N/A | N/A | Yes ("medium" and "strong" collisions) | Yes: CSMA/CD | Yes, through check sum |
| Slave supply | Parasitic (typical), VDD (exception) | VDD only | VDD only | VDD only | VDD only | Parasitic and/or local supply | VDD only, local or remote source | Parasitic only |
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