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【应用手册】Implementing PLL Reconfiguration in Cyclone III Devices
This application note describes the flow for implementing phase-locked loop (PLL)
reconfiguration in Cyclone® III devices and how to use the PLL reconfiguration
feature. Use this application note in conjunction with the following literature:
■ Clock Networks and PLLs in Cyclone III Devices chapter in volume 1 of the Cyclone III
Device Handbook
■ Phase-Locked Loop (ALTPLL) Megafunction User Guide
■ Phase-Locked Loop Reconfiguration (ALTPLL_RECONFIG) Megafunction user guide
This application note discusses the following topics:
■ Overview of PLL reconfiguration in Cyclone III devices
■ Complete flow on implementing real-time PLL reconfiguration feature in a
frequency prescaler application
■ Complete flow on implementing dynamic phase-shifting feature
■ Design considerations that you must consider when selecting PLL parameters for
reconfiguration
AN507.pdf