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共61条 6/7 |‹ ‹ 2 3 4 5 6 7 › 跳转至页
zwsheng
工程师
2012-12-11 23:44:46     打赏
51楼

     设计一拔河游戏机
1、设计一个能进行拔河游戏的电路。
2、电路使用11个发光二极管，开机后只有中间一个发亮，此即拔河的中心点。游戏双方各持一个按钮（本次游戏使用KEY1和KEY2），迅速地、不断地按动，产生脉冲，谁按得快，亮点就向谁的方向移动，每按一次，亮点移动一次。
3、亮点移到任一方终端二极管时，这一方就获胜，此时双方按钮均无作用，输出保持，只有复位后才使亮点恢复到中心。
4、用两个数码管显示玩家按的次数。结束一局后用KEY3可以清除双方按的次数。
4、用两个数码管显示获胜者的盘数。游戏结束后可以用KEY4清除双方的比分
    大家一起来玩这个游戏吧！

视频：




整体电路图：



玩家按键模块：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH;
entity baheji IS
    PORT (
    reset,key1,key2    : in std_logic;
    led6: out std_logic;
    count1,count2: out std_logic_vector(3 downto 0)
    );
    end baheji;
architecture behave of baheji is
 
  signal count1_r:  std_logic_vector(3 downto 0); 
  signal count2_r:  std_logic_vector(3 downto 0);
 
  begin
  u1:process(key1,reset)
        begin
        if reset='0'then
          led6<='0'; count1_r<="0000";
           else
            if  key1'event and key1='0'then
                count1_r(3 downto 0)<=count1_r(3 downto 0)+1;
            end if;
        end if;
    
  
     end process;
    count1<=count1_r;
 
 u2:process(key2,reset)
begin
if reset='0' then
        count2_r<="0000";
        else
       if key2'event and key2='0'then
     
        count2_r(3 downto 0)<=count2_r(3 downto 0)+1;
  
        end if;
         end if ;
       
      end process;
    count2<=count2_r;  
end behave;

一方玩家按键次数计数模块：
  LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH;
entity bijiao IS
    PORT (
     clk:in std_logic;
     count1 : in std_logic_vector(3 downto 0);
     count2 : in std_logic_vector(3 downto 0);
    led1,led2,led3,led4,led5,led6:out std_logic
    );
    end bijiao;
architecture behave of bijiao is
  signal kongzhi1:   std_logic_vector(3 downto 0);

  begin
  kongzhi1<=count1-count2;
 
 process(kongzhi1)
begin
if clk'event and clk='1' then
case(kongzhi1)is
  when "0000"=>led6<='0';led5<='1';led4<='1';led3<='1';led2<='1';led1<='1';
  when "0001"=>led5<='0';led6<='1';led4<='1';led3<='1';led2<='1';led1<='1';
  when "0010"=>led4<='0';led6<='1';led5<='1';led3<='1';led2<='1';led1<='1';
  when "0011"=>led3<='0';led6<='1';led5<='1';led4<='1';led2<='1';led1<='1';
  when "0100"=>led2<='0';led6<='1';led5<='1';led4<='1';led3<='1';led1<='1';
  when "0101"=>led1<='0';led6<='1';led5<='1';led4<='1';led3<='1';led2<='1';
  when others=>led6<='1';led5<='1';led4<='1';led3<='1';led2<='1';led1<='1';
 -- when others=> null;
  end case;
  end if;
  end process;
  end behave;

另一方方玩家按键次数计数模块：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH;
entity bijiao2 IS
    PORT (
     clk:in std_logic;
     count1 : in std_logic_vector(3 downto 0);
     count2 : in std_logic_vector(3 downto 0);
    led6,led7,led8,led9,led10,led11:out std_logic
    );
    end bijiao2;
architecture behave of bijiao2 is
 
 
  signal kongzhi:   std_logic_vector(3 downto 0);
 -- signal led11_r:   std_logic;
  begin
  kongzhi<=count2-count1;
   process(kongzhi)
begin
  if clk'event and clk='1' then
  --if led11_r<='0' then
    -- led6<='1'; led7<='1';
    -- led8<='1';led10<='1';
   --  led10<='1';
    
case(kongzhi)is
  when "0000"=>led6<='0';led7<='1'; led8<='1';led9<='1';led10<='1';led11<='1';
  when "0001"=>led7<='0';led6<='1'; led8<='1';led9<='1';led10<='1';led11<='1';
  when "0010"=>led8<='0';led6<='1'; led7<='1';led9<='1';led10<='1';led11<='1';
  when "0011"=>led9<='0';led6<='1'; led7<='1';led8<='1';led10<='1';led11<='1';
  when "0100"=>led10<='0';led6<='1'; led7<='1';led8<='1';led9<='1';led11<='1';
  when "0101"=>led11<='0';led6<='1'; led7<='1';led8<='1';led10<='1';led10<='1';
  when others=>led11<='1';led6<='1'; led7<='1';led8<='1';led10<='1';led10<='1';
  --when others=> null;
  end case;
  end if;
 -- end if;
 --led11<=led11_r;
  end process;
  end behave;


计入一家玩家所赢的盘数模块：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH;
entity jishu IS
    PORT (led1: in std_logic;
    bifen1 : out std_logic_vector(3 downto 0);
    reset  : in std_logic
      );
    end jishu;
architecture behave of jishu is
  signal bifen1_r:  std_logic_vector(3 downto 0);
  begin
  process(led1,reset)
        begin
       if reset='0'then
       bifen1_r<="0000";
       else
       if led1'event and led1='0'then
       bifen1_r(3 downto 0)<=bifen1_r(3 downto 0)+1;
       end if;
       end if;
   end process;
    bifen1<=bifen1_r;
   end behave;

计入另一家玩家所赢的盘数模块：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH;
entity jishu2 IS
    PORT (led11: in std_logic;
  
    bifen2 : out std_logic_vector(3 downto 0);
    reset  : in std_logic);
    end jishu2;
architecture behave of jishu2 is
 signal bifen2_r:  std_logic_vector(3 downto 0);
  begin
   u2:process(led11,reset)
        begin
       if reset='0'then
       bifen2_r<="0000";
       else
       if led11'event and led11='0'then
       bifen2_r(3 downto 0)<=bifen2_r(3 downto 0)+1;
       end if;
       end if;
   end process;
    bifen2<=bifen2_r;
    end behave;

其他的都是我们经常用到的，数码管驱动模块、分频模块和消抖模块，一起经常公布这里就不公布了。
拔河机.SOF文件下载地址。Y2晶振：http://share.eepw.com.cn/share/download/id/82903

大家可以下载区玩玩！


评论
tarzanfun
高工
2012-12-12 09:50:00     打赏
52楼
挺有意思，赞一个，就是按键质量要求比较高。。。。

评论
zwsheng
工程师
2012-12-12 09:54:41     打赏
53楼
嗯，怕按多了，会把按键按松、按坏！

评论
anananjjj
工程师
2012-12-12 10:36:28     打赏
54楼
支持！！加油啊！！

评论
天马流星
助工
2012-12-12 17:34:27     打赏
55楼
不错哦！支持下！

评论
zwsheng
工程师
2012-12-16 11:26:46     打赏
56楼




整体原理图：


LCD12864程序：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
entity LCD12864 is
port ( clk :in std_logic;
       lcd_rs:out std_logic;
       lcd_rw:out std_logic;
      lcd_e: out std_logic;
      data:out std_logic_vector(7 downto 0)
);
end LCD12864;
architecture one of LCD12864 is
signal bcd: std_logic_vector(5 downto 0);
signal cnt: std_logic_vector(9 downto 0);
--signal count:std_logic_vector(7 downto 0):="00110000";
begin
process(clk)
begin
if clk'event and clk='1' then
   bcd<=bcd+1;
   cnt<=cnt+1;
   --count<=count+1;
   case bcd is
   when "000000"=>
         lcd_rs<='0';
         lcd_e<='1';
         data<="00110000";
   when "000001"=>
         lcd_rs<='0';
         lcd_e<='0';
        
   when "000010"=>
         lcd_rs<='0';
         lcd_e<='1';
         data<="00001100";
   when "000011"=>
         lcd_rs<='0';
         lcd_e<='0';
        
   when "000100"=>
         lcd_rs<='0';
         lcd_e<='1';
         data<="10000001";
   when "000101"=>
         lcd_rs<='0';
         lcd_e<='0';      
   when "000110"=>      --xian e
         lcd_rs<='1';
         lcd_e<='1';
         data<="01100101";
   when "000111"=>
         lcd_rs<='1';
         lcd_e<='0'; 
          
   when "001010"=>        --xian  e
         lcd_rs<='1';
         lcd_e<='1';
         data<="01100101"; 
   when "001011"=>
         lcd_rs<='1';
         lcd_e<='0';   
         
   when "001110"=>       --xian p
         lcd_rs<='1';
         lcd_e<='1';
         data<="01110000"; 
   when "001111"=>
         lcd_rs<='1';
         lcd_e<='0';
     
   when "010010"=>       --xian w
         lcd_rs<='1';
         lcd_e<='1';
         data<="01110111"; 
   when "010011"=>
         lcd_rs<='1';
         lcd_e<='0'; 
   
   when "010100"=>          
        lcd_rs<='0';
        lcd_e<='1';
        data<="10000100";
   when "010101"=>
        lcd_rs<='0';
        lcd_e<='0';         
   when "010110"=>       --xian z
         lcd_rs<='1';
         lcd_e<='1';
         data<="01111010"; 
   when "010111"=>
         lcd_rs<='1';
         lcd_e<='0'; 
       
   when "011010"=>       --xian h
         lcd_rs<='1';
         lcd_e<='1';
         data<="01101000"; 
   when "011011"=>
         lcd_rs<='1';
         lcd_e<='0';   
   
   when "011110"=>       --xian w
         lcd_rs<='1';
         lcd_e<='1';
         data<="01110111"; 
   when "011111"=>
         lcd_rs<='1';
         lcd_e<='0';   
            
   when "100010"=>       --xian e
         lcd_rs<='1';
         lcd_e<='1';
         data<="01100101"; 
   when "100011"=>
         lcd_rs<='1';
         lcd_e<='0';   
           
   when "100110"=>       --xian  n
         lcd_rs<='1';
         lcd_e<='1';
         data<="01101110"; 
   when "100111"=>
         lcd_rs<='1';
         lcd_e<='0';   
   
   when "101010"=>       --xian g
         lcd_rs<='1';
         lcd_e<='1';
         data<="01100111"; 
   when "101011"=>
         lcd_rs<='1';
         lcd_e<='0';
       --  bcd<="000000"; 
      
      
   when "101100"=>          
        lcd_rs<='0';
        lcd_e<='1';
        data<="10010000";
   when "101101"=>
        lcd_rs<='0';
        lcd_e<='0';         
   when "101110"=>       --显示空心菜
        lcd_rs<='1';
        lcd_e<='1';
        data<="10111111";
   when "101111"=>
         lcd_rs<='1';
         lcd_e<='0';   
   when "110000"=>
         lcd_rs<='1';
         lcd_e<='1';
         data<="11010101";
   when "110001"=>
         lcd_rs<='1';
         lcd_e<='0'; 
               
   when "110010"=>    
        lcd_rs<='1';
        lcd_e<='1';
        data<="11010000";
   when "110011"=>
         lcd_rs<='1';
         lcd_e<='0';   
   when "110100"=>
         lcd_rs<='1';
         lcd_e<='1';
         data<="11000100";
   when "110101"=>
         lcd_rs<='1';
         lcd_e<='0';
        
    when "110110"=>      
        lcd_rs<='1';
        lcd_e<='1';
        data<="10110010";
   when "110111"=>
         lcd_rs<='1';
         lcd_e<='0';   
   when "111000"=>
         lcd_rs<='1';
         lcd_e<='1';
         data<="11001011";
   when "111001"=>
         lcd_rs<='1';
         lcd_e<='0';                                                                                                                 
   when others=>null;          
   end case;
     
end if;
end process;  
end ;

分频：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY CLKDIV IS
PORT (CLK : IN STD_LOGIC;
     CLKOUT: OUT STD_LOGIC
);
END CLKDIV;

ARCHITECTURE ONE OF CLKDIV IS
SIGNAL CNT: STD_LOGIC_VECTOR(19 DOWNTO 0);
BEGIN
PROCESS (CLK)
BEGIN
IF CLK'EVENT AND CLK='1' THEN
   IF CNT>50000 THEN
      CNT<=(OTHERS=>'0');
      CLKOUT<='0';
  ELSIF CNT>25000 THEN
        CLKOUT<='1';
        CNT<=CNT+1;
   ELSE
       CNT<=CNT+1;
    END IF ;
END IF ;
END PROCESS;
END ;
   


评论
zwsheng
工程师
2012-12-20 16:38:23     打赏
57楼


 
整体原理图：





主要代码：
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity taxi is
port ( clk_240  :in std_logic;                           --频率为240Hz的时钟                        
       start :in std_logic;                               --计价使能信号
       stop:in std_logic;                                --等待信号
       fin:in std_logic;                                 --公里脉冲信号
       cha3,cha2,cha1,cha0:out std_logic_vector(3 downto 0); --费用数据
       km1,km0:out std_logic_vector(3 downto 0);          --公里数据           
       min1,min0: out std_logic_vector(3 downto 0));       --等待时间  
end taxi;
architecture behav of taxi is
signal f_15,f_16,f_1:std_logic;                       --频率为15Hz，16Hz，1Hz的信号
signal q_15:integer range 0 to 15;                     --分频器
signal q_16:integer range 0 to 14;                     --分频器
signal q_1:integer range 0 to 239;                     --分频器
signal w:integer range 0 to 59;                        --秒计数器
signal c3,c2,c1,c0:std_logic_vector(3 downto 0);         --制费用计数器
signal k1,k0:std_logic_vector(3 downto 0);              --公里计数器
signal m1:std_logic_vector(2 downto 0);                --分的十位计数器
signal m0:std_logic_vector(3 downto 0);                --分的个位计数器
signal en1,en0,f:std_logic;                            --使能信号
begin

feipin:process(clk_240,start)
begin
  if clk_240'event and clk_240='1' then
    if start='0' then q_15<=0;q_16<=0;f_15<='0';f_16<='0';f_1<='0';f<='0';
    else
      if q_15=15 then q_15<=0;f_15<='1';          --此语句得到频率为15Hz的信号
      else q_15<=q_15+1;f_15<='0';
      end if;
      if q_16=14 then q_16<=0;f_16<='1';          --此语句得到频率为16Hz的信号
      else q_16<=q_16+1;f_16<='0';
      end if;
      if q_1=239 then q_1<=0;f_1<='1';            --此语句得到频率为1Hz的信号
      else q_1<=q_1+1;f_1<='0';
      end if;
      if en1='1' then f<=f_15;                    --此语句得到计费脉冲f
      elsif en0='1' then f<=f_16;
      else f<='0';
      end if;
    end if;
  end if;
end process;

process(f_1)
begin
  if f_1'event and f_1='1' then
    if start='0' then
w<=0;en1<='0';en0<='0';m1<="000";m0<="0000";k1<="0000";k0<="0000";
    elsif stop='1' then
      if w=59 then w<=0;                             --此语句完成等待计时
        if m0="1001" then m0<="0000";                --此语句完成分计数
          if m1<="101" then m1<="000";
          else m1<=m1+1;
          end if;
        else m0<=m0+1;
        end if;
        if m1&m0>"0000001"then en1<='1';             --此语句得到en1使能信号
        else en1<='0';
        end if;
      else w<=w+1;en1<='0';
      end if;
    elsif fin='1' then
      if k0="1001" then k0<="0000";                    --此语句完成公里脉冲计数
        if k1="1001" then k1<="0000";
        else k1<=k1+1;
        end if;
      else k0<=k0+1;
      end if;
      if k1&k0>"00000010" then en0<='1';               --此语句得到en0使能信号
      else en0<='0';
      end if;       
    else en1<='0';en0<='0';
    end if;
cha3<=c3;cha2<=c2;cha1<=c1;cha0<=c0;                   --费用数据输出
km1<=k1;km0<=k0;min1<='0'&m1;min0<=m0;              --公里数据、分钟数据输出
  end if;
end process;

process(f,start)
begin
  if start='0' then c3<="0000";c2<="0001";c1<="0000";c0<="0000";
  elsif f'event and f='1' then
    if c0="1001" then c0<="0000";                       --此语句完成对费用的计数
      if c1="1001" then c1<="0000";
        if c2="1001" then c2<="0000";
          if c3<="1001" then c3<="0000";
          else c3<=c3+1;
          end if;
        else c2<=c2+1;
        end if;
      else c1<=c1+1;
      end if;
    else c0<=c0+1;
    end if;
  end if;
end process;
end behav;

仿真时序图

  
出租车制动收费器的.SOF文档下载链接：http://share.eepw.com.cn/share/download/id/83518


评论
tarzanfun
高工
2012-12-20 16:55:59     打赏
58楼
弱弱的问一下，天天用VHDL写这写东西是不是很累啊。。。我是看不懂。

评论
jackwang
院士
2012-12-20 16:56:00     打赏
59楼
不错的~~~~~

评论
zwsheng
工程师
2012-12-20 22:32:06     打赏
60楼
VHDL语法比较严格，用VHDL写程序脑子一定要清晰！我也是初学者，有点枯燥！

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共61条 6/7 |‹ ‹ 2 3 4 5 6 7 › 跳转至页

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