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共31条 2/4 1 2 3 4 跳转至
菜鸟
2012-11-11 19:08:43     打赏
11楼

菜鸟
2012-11-11 19:09:56     打赏
12楼
消抖程序
module key2(clk,rst_n,key,led);
//programmed by haohaolinux
        input clk,rst_n,key;
        output led;
       
        reg key_rst;
        always @(posedge clk or negedge rst_n)
                if(!rst_n)
                        key_rst=1'b1;
                else
                        key_rst=key;
                       
        reg key_rst_r;
        always @(posedge clk or negedge rst_n)
                if(!rst_n)
                        key_rst_r=1'b1;
                else
                        key_rst_r=key_rst;
                       
        //key_an捕捉key的下降沿,当有按键按下时,key_an置高
        wire key_an=key_rst_r & (~key_rst);
       
        //计数,当有按键按下时,从0开始计数。。
        reg [19:0] cnt;
        always@(posedge clk or negedge rst_n)
                if(!rst_n)
                        cnt=20'b0;
                else if(key_an)
                        cnt=20'b0;
                else
                        cnt=cnt+1;
       
        //当计数器满的时候,再次捕捉按键是否被按下,如果被按下,则led_ctrl置高。。
        reg low_sw;
        always@(posedge clk or negedge rst_n)
                if(!rst_n)
                        low_sw=1'b1;
                else if(cnt==20'hfffff)
                        low_sw=key;
        reg low_sw_r;
        always@(posedge clk or negedge rst_n)
                if(!rst_n)
                        low_sw_r=1'b1;
                else
                        low_sw_r=low_sw;
                       
        //捕捉low sw的下降沿
        wire led_ctrl=low_sw_r & (~low_sw);      
       
        reg d1;
        always@(posedge clk or negedge rst_n)
                if(!rst_n)
                        d1=0;
                else
                        if(led_ctrl) d1=~d1;
               
  assign led=d1?1:0; endmodule

菜鸟
2012-11-11 19:10:26     打赏
13楼

菜鸟
2012-11-11 19:11:01     打赏
14楼
拨码开关程序:
module switch(switch,LED);
//programmed by haohaolinux
 input switch;
 output LED;
               
 assign LED=switch?1:0; endmodule

菜鸟
2012-11-11 19:11:30     打赏
15楼

菜鸟
2012-11-11 19:12:10     打赏
16楼
静态数码管程序:
module digitron(clk,rst_n,sm_cs,sm_db);
        input clk,rst_n;
        output [7:0] sm_cs;
        output [6:0] sm_db;
       
        //计数,2^24=16*10^6;即16*10^6*20ns=0.32s=320ms
        reg [24:0] cnt;
       
        always @(posedge clk or negedge rst_n)
                if(!rst_n) cnt<=25'b0;
                else cnt<=cnt+1'b1;
               
        reg [3:0] num;
       
        always @(posedge clk or negedge rst_n)
                if(!rst_n) num<=4'b0;
                else if(cnt==25'h1ff_ffff) num<=num+1'b1;
               
        parameter
                        seg0 = 7'hc0,
                        seg1 = 7'hf9,
                        seg2 = 7'ha4,
                        seg3 = 7'hb0,
                        seg4 = 7'h99,
                        seg5 = 7'h92,
                        seg6 = 7'h82,
                        seg7 = 7'hf8,
                        seg8 = 7'h80,
                        seg9 = 7'h90,
                        sega = 7'h88,
                        segb = 7'h83,
                        segc = 7'hc6,
                        segd = 7'ha1,
                        sege = 7'h86,
                        segf = 7'h8e;
                        //segf =7'hff; 
                       
        reg [6:0] sm_dbr;
        always @(num)
                case(num)
                        4'h0:sm_dbr<=seg0;
                        4'h1:sm_dbr<=seg1;
                        4'h2:sm_dbr<=seg2;
                        4'h3:sm_dbr<=seg3;
                        4'h4:sm_dbr<=seg4;
                        4'h5:sm_dbr<=seg5;
                        4'h6:sm_dbr<=seg6;
                        4'h7:sm_dbr<=seg7;
                        4'h8:sm_dbr<=seg8;
                        4'h9:sm_dbr<=seg9;
                        4'hA:sm_dbr<=sega;
                        4'hB:sm_dbr<=segb;
                        4'hC:sm_dbr<=segc;
                        4'hD:sm_dbr<=segd;
                        4'hE:sm_dbr<=sege;
                        4'hF:sm_dbr<=segf;
                        default:;
                endcase
               
        assign sm_db = sm_dbr;
        assign sm_cs = 8'h00;
       
endmodule

菜鸟
2012-11-11 19:12:48     打赏
17楼

菜鸟
2012-11-11 19:13:38     打赏
18楼

动态数码管程序:
module digitron2(clk,rst_n,sm_cs,sm_db);
        input clk,rst_n;
        output [3:0] sm_cs;
        output [6:0] sm_db;
       
        //计数,2^24=16*10^6;即16*10^6*20ns=0.32s=320ms
        reg [24:0] cnt;
       
        always @(posedge clk or negedge rst_n)
                         if(!rst_n) cnt<=25'b0;
                         else cnt<=cnt+1'b1;
       
        reg [3:0] shi,ge;
        always @(posedge clk or negedge rst_n)
                         if(!rst_n)
                         begin
                                shi = 4'd0;
                                ge = 4'd0;
                         end
                         else if(cnt==25'h1ff_ffff)
                         begin
                                if(ge == 4'd9)
                                begin
         ge = 4'hf;
         shi = shi+1;
        end
        else
         shi = shi;
         
        if(shi == 4'd9)
         shi = 0;
        else
         shi = shi;
         
                                ge = ge+1;
                         end
       
        parameter
                        seg0 = 7'hc0,
                        seg1 = 7'hf9,
                        seg2 = 7'ha4,
                        seg3 = 7'hb0,
                        seg4 = 7'h99,
                        seg5 = 7'h92,
                        seg6 = 7'h82,
                        seg7 = 7'hf8,
                        seg8 = 7'h80,
                        seg9 = 7'h90;       
        reg [3:0] num;
        reg [6:0] sm_dbr;
        always @(num)
                case(num)
                        4'h0:sm_dbr<=seg0;
                        4'h1:sm_dbr<=seg1;
                        4'h2:sm_dbr<=seg2;
                        4'h3:sm_dbr<=seg3;
                        4'h4:sm_dbr<=seg4;
                        4'h5:sm_dbr<=seg5;
                        4'h6:sm_dbr<=seg6;
                        4'h7:sm_dbr<=seg7;
                        4'h8:sm_dbr<=seg8;
                        4'h9:sm_dbr<=seg9;
                        default:;
                endcase
       
        reg sm_cs2_r,sm_cs1_r;
        always @(clk or shi or ge)
        begin
                if(cnt[20])
                begin
                        sm_cs2_r = 0;
                        sm_cs1_r = 1;
                        num = shi;
                end
                else
                begin
                        sm_cs2_r = 1;
                        sm_cs1_r = 0;      
                        num = ge;
                end
        end
       
        assign sm_db = sm_dbr;
        assign sm_cs[1:0] = 2'b11;
        assign sm_cs[3] = sm_cs1_r;
        assign sm_cs[2] = sm_cs2_r;
       
endmodule


菜鸟
2012-11-11 19:14:07     打赏
19楼

菜鸟
2012-11-11 19:14:50     打赏
20楼

蜂鸣器程序:
module beep(clk,rst_n,beep);
        input clk,rst_n;
  output beep;
       
        //计数,2^24=16*10^6;即16*10^6*20ns=0.32s=320ms
        reg [24:0] cnt;
        reg beep;
       
        always @(posedge clk or negedge rst_n)
                         if(!rst_n) cnt<=25'b0;
                         else cnt<=cnt+1'b1;
                        
        always @(posedge clk or negedge rst_n)
                         if(!rst_n) beep<=1'b0;
                         else if(cnt[18])
       beep <= 1'b1;
      else
       beep <= 1'b0;
       
endmodule


共31条 2/4 1 2 3 4 跳转至

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