源代码:
waite_posedge:
begin
ir_cnt<=ir_cnt+1'b1;
if(ir_posedge)
ir_state<=check_9ms;
else
ir_state<=waite_posedge;
end
check_9ms:
begin
if(t_9ms)
begin
ir_state<=waite_negedge;
ir_cnt<=9'd0;
end
else
ir_state<=idle;
end
这段代码是计数9ms后,判断上升沿,还是判断上升沿,在进行计数9ms,时序上应该是高电平是9ms,没有理解这个代码,有高手解释一下