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5-1 同步复位 异步复位。同步复位是指与时钟同步，当复位信号有效之后，出现时钟有效边沿时才对电路模块进行复位操作；而异步复位与时钟信号无关，只要复位信号有效，无论这时时钟信号是什么样，都对电路模块进行复位操作。

5-7

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity counter is
port(
allow,reset,clk :in bit;
o:out integer range 0 to 10;
c:out bit);
end counter;
architecture behaver of counter is
begin
 p1: process (clk,reset,allow)
 variable ot:integer range 0 to 10:=0;
 variable t:bit ;
 begin 
if(reset='1')then o<=0;
 elsif (allow='1') then
  if(clk'event and clk='1')then
  ot:=ot+1;t:='0';
  if(ot>9) then ot:=0;t:='1';
  end if;
  end if;
  o<=ot;
  c<=t;
end if;
end process p1;
end architecture behaver;

5-8

library IEEE;use IEEE.std_logic_1164.all;

use IEEE.std_logic_unsigned.all;

entity cnt_16 is

    port (

        clk: in STD_LOGIC;

        k: in STD_LOGIC;

        clr: in STD_LOGIC;

        q: out STD_LOGIC_VECTOR (15 downto 0)

    );

end cnt_16;

architecture cnt_16_arch of cnt_16 is

signal qq:std_logic_vector(15 downto 0);

begin

process(clk,clr,k)

begin

 if clr='1' then

  qq<="0000000000000000";

 elsif clk'event and clk='1' then

  if k='1' then

     qq<=qq+'1';

  else

     qq<=qq-'1';

   end if;

 end if;

end process;

process(qq)

begin

 q<=qq;

end process;

end cnt_16_arch;