EEPW论坛

请教：tornado中主机和目标机没有网口连接，用串口，修改bsp中的config 如何改？特别使DEFAULT_BOOT_LINE如何改？用TSFS设置目标机的时候Target name/ip address 如何填 没有网口 ，所以没有地址，如果是Target name 是填哪定义的名字？谢谢先。
之前在论坛看过一个相关帖子，但是由于我刚刚接触，改过的config 编译不通过，生成不了bootrom，求高手指教。。
下面是默认生成的网口的：
#ifndef INCconfigh
#define INCconfigh

/* BSP version/revision identification, before configAll.h */
#define BSP_VER_1_1 1 /* 1.2 is backward compatible with 1.1 */
#define BSP_VER_1_2 1
#define BSP_VERSION "1.2"
#define BSP_REV "/0" /* 0 for first revision */
#include "configAll.h" /* Set the VxWorks default configuration */
#include "ppc405_0_drv_config.h" /* Set the IP CSP default configuration */
#ifdef INCLUDE_XPCI
#include "xpci_l.h" /* for the CAR/CDR offsets */
#include "xparameters.h" /* for PCI base address */
#endif /* INCLUDE_XPCI */
/*
* BOOTLINE notes:
*
* Forms of bootline supported:
* "xemac(0,0)host:c:/tornado/target/config/bsp/vxWorks h=192.168.0.1 e=192.168.0.2 u=xemhost"
*
* TODO - The IP addresses can be changed in the boot line. Be sure to change
* the correct one for the interface (10/100 or Gigabit) with xemac being 10/100
* and xgemac being Gigabit.
*/
#if defined INCLUDE_XEMAC_END
#define DEFAULT_BOOT_LINE \
"xemac(0,0)host:vxWorks h=192.168.0.1 e=192.168.0.2 u=xemhost"
#elif defined INCLUDE_XGEMAC_END
#define DEFAULT_BOOT_LINE \
"xgemac(0,0)host:vxWorks h=192.168.0.1 e=192.168.0.2 u=xemhost"
#elif defined INCLUDE_XEMACLITE_END
#define DEFAULT_BOOT_LINE \
"maclite(0,0)host:vxWorks h=192.168.0.1 e=192.168.0.2 u=xemhost"
#else
#define DEFAULT_BOOT_LINE \
"todo(0,0)host:vxWorks h=192.168.0.1 e=192.168.0.2 u=xemhost"
#endif
/* memory configuration */
#define LOCAL_MEM_LOCAL_ADRS 0
#undef LOCAL_MEM_AUTOSIZE /* no run-time memory sizing */
#define LOCAL_MEM_SIZE 0x200000 /* TOD fixed memory size */
#define USER_RESERVED_MEM 0 /* see sysMemTop() */
/*
* The constants ROM_TEXT_ADRS, ROM_SIZE, RAM_HIGH_ADRS, and RAM_LOW_ADRS
* are defined in config.h and Makefile.
* All definitions for these constants must be identical.
*
* TODO - Make sure these values match those in your Makefile.
* Pay particular attention to ROM_TEXT_ADRS and ROM_WARM_ADRS.
*/
#define ROM_BASE_ADRS 0xff800000 /* base address of ROM */
#define ROM_TEXT_ADRS (ROM_BASE_ADRS) /* with PC & SP */
#define ROM_WARM_ADRS (ROM_TEXT_ADRS+8) /* warm reboot entry */
#define ROM_SIZE 0x00040000 /* 256KB ROM space */
#define RAM_HIGH_ADRS 0x00200000 /* RAM address for bootrom */
#define RAM_LOW_ADRS 0x00010000 /* RAM address for vxWorks */
/*
* Serial port configuration
* NUM_TTY is the total number of serial ports in all sio drivers in the BSP
*/
#define INCLUDE_SERIAL /* Enable serial support */
#define INCLUDE_SIO /* Enable Serial IO driver support */
#define INCLUDE_TTY_DEV /* Enable ty support */
#undef CONSOLE_TTY
#define CONSOLE_TTY 0 /* console channel */
#undef CONSOLE_BAUD_RATE
#define CONSOLE_BAUD_RATE 19200 /* console baud rate */
#undef NUM_TTY
#define NUM_TTY N_SIO_CHANNELS /* Number serial channels */
/* Timer configuration */
#undef INCLUDE_TIMESTAMP /* no timestamp driver support */
/* DOS File system support (all required for System ACE CF), define to enable */
#undef INCLUDE_DOSFS_MAIN
#undef INCLUDE_DOSFS_FAT
#undef INCLUDE_DISK_CACHE
#undef INCLUDE_DISK_PART
#undef INCLUDE_DOSFS_DIR_FIXED
#undef INCLUDE_DOSFS_DIR_VFAT
#undef INCLUDE_CBIO
/* System ACE device configuration */
#define SYSACE_MAX_OPEN_FILES 5
#define SYSACE_MAX_PARTITIONS 1
#define SYSACE_DISK_CACHE_SIZE 0x20000 /* Size of the disk cache */
/*
* The following time in Us is added to the delay parameter of the sysUsDelay()
* function to account for the overhead encountered calling and returning
* from the function. For a CPU clock of 300Mhz, the overhead has been measured
* to be around 3Us for -O2 optimization and around 10Us for -O0 (gnu w/cache
* enabled) Adjust as necessary.
*/
#define SYS_US_DELAY_BIAS (-2) /* Amount of bias to add to sysUsDelay() */
/* Cache configuration */
#undef INCLUDE_CACHE_SUPPORT /* no cacheLib support */
#undef USER_I_CACHE_ENABLE
#undef USER_I_CACHE_MODE
#define USER_I_CACHE_MODE CACHE_DISABLED
#undef USER_D_CACHE_ENABLE
#undef USER_D_CACHE_MODE
#define USER_D_CACHE_MODE CACHE_DISABLED
#undef USER_B_CACHE_ENABLE
/* MMU configuration */
#undef INCLUDE_MMU_BASIC /* Basic MMU support */
#undef INCLUDE_MMU_FULL /* Full MMU support */
/*
* Enable only the data mmu to increase performance. Rely on the ICCR to
* set where instruction caching occurs.
*/
#undef USER_D_MMU_ENABLE
#undef USER_I_MMU_ENABLE
#if defined(INCLUDE_MMU_BASIC) || defined(INCLUDE_MMU_FULL)
# ifndef INCLUDE_CACHE_SUPPORT
# error "INCLUDE_CACHE_SUPPORT required when MMU support is included"
# endif
#endif
/* Network */
#define INCLUDE_NETWORK
#ifdef INCLUDE_NETWORK
# define INCLUDE_NET_INIT
# undef INCLUDE_SM_NET
# define INCLUDE_NET_SHOW
# define INCLUDE_PING
# define INCLUDE_END /* Enhanced Network Driver (see configNet.h) */
# define INCLUDE_BSD /* BSD 4.4 drivers (required for loopback) */
#else
# undef INCLUDE_NET_INIT
# undef INCLUDE_NET_SHOW
# undef INCLUDE_SM_NET
# undef INCLUDE_PING
# undef INCLUDE_END
# undef INCLUDE_BSD
#endif /* INCLUDE_NETWORK */
/* Wind River Debug Agent (WDB) configuration */
#undef INCLUDE_WDB
#undef WDB_COMM_TYPE
#define WDB_COMM_TYPE WDB_COMM_END
#if (WDB_COMM_TYPE == WDB_COMM_SERIAL)
# define WDB_TTY_CHANNEL 1
# undef WDB_TTY_BAUD
# define WDB_TTY_BAUD 115200
#endif
/* Shell */
#undef INCLUDE_SHELL
/* Symbol table */
#undef INCLUDE_NET_SYM_TBL
#undef INCLUDE_SYM_TBL
#undef INCLUDE_STANDALONE_SYM_TBL
/* Loader */
#undef INCLUDE_LOADER
#undef INCLUDE_UNLOADER
/* PCI configuration */
#ifdef INCLUDE_XPCI
# ifndef INCLUDE_PCI
# define INCLUDE_PCI
# endif
#endif
#ifdef INCLUDE_PCI
/*
* TOD Adjust PCI memory space according to your system.
*/
# define PCI_MEMORY_START 0x70000000 /* PCI memory space (prefetch) */
# define PCI_MEMORY_END 0x700007FF /* PCI memory end (prefetch) */
/*
* Register pair used to generate configuration cycles on the PCI bus
* and access the PCI Bridge configuration registers. If the Xilinx device
* and driver are included, use its base address plus offset for these.
* Otherwise, just default to standard VxWorks values.
*/
#ifdef INCLUDE_XPCI
# define PCI_CFGADDR (vtag_baseaddr + XPCI_CAR_OFFSET)
# define PCI_CFGDATA (vtag_baseaddr + XPCI_CDR_OFFSET)
#else
# define PCI_CFGADDR PCI_CONFIG_ADDR
# define PCI_CFGDATA PCI_CONFIG_DATA
#endif
/*
* Bus/Device/Function used to access the PCI configuration registers
* that belong to the host bridge itself (Bus = Device = Function = 0).
*
* TOD Adjust these values according to the bridge configuration
*/
# define PCI_BRIDGE_BUSNO 0 /* Host bridge bus number */
# define PCI_BRIDGE_SUBBUSNO 0 /* Host bridge sub-bus number */
# define PCI_BRIDGE_DEVICE 0 /* Host bridge device id */
# define PCI_BRIDGE_FUNCTION 0 /* Host bridge function id */

/* Enable auto-configuration */
# define INCLUDE_PCI_AUTOCONF
/*
* TOD Define a slave window that allows PCI masters to access memory
* on the local bus.
*/
# define PCI_SLV_MEM_LOCAL LOCAL_MEM_LOCAL_ADRS
# define PCI_SLV_MEM_BUS LOCAL_MEM_LOCAL_ADRS
# define PCI_SLV_MEM_SIZE LOCAL_MEM_SIZE
/*
* TOD Define a master window that allows the CPU to access remote PCI
* memory (with prefetch).
*/
# define PCI_MSTR_MEM_LOCAL PCI_MEMORY_START
# define PCI_MSTR_MEM_BUS PCI_MEMORY_START
# define PCI_MSTR_MEM_SIZE 0x00000800
/*
* TOD Define a master window that allows the CPU to access remote PCI
* memory (non-prefetch).
*/
# define PCI_MSTR_MEMIO_LOCAL (PCI_MEMORY_START + PCI_MSTR_MEM_SIZE)
# define PCI_MSTR_MEMIO_BUS (PCI_MSTR_MEM_BUS + PCI_MSTR_MEM_SIZE)
# define PCI_MSTR_MEMIO_SIZE 0x00100000
/*
* TOD Master window that allows CPU to access PCI I/O space.
*/
# define PCI_MSTR_IO_LOCAL 0x00000000
# define PCI_MSTR_IO_BUS 0x00000000
# define PCI_MSTR_IO_SIZE 0x00000000
/*
* TOD PCI Latency Timer value
*/
# define PCI_LAT_TIMER 0xFF
#endif /* INCLUDE_PCI */

/* C++ components. If you want it, here is what has to be defined */
#undef INCLUDE_CPLUS
#undef INCLUDE_CPLUS_COMPLEX_IO
#undef INCLUDE_CPLUS_COMPLEX
#undef INCLUDE_CPLUS_IOSTREAMS_TEST
#undef INCLUDE_CPLUS_STL
#undef INCLUDE_CPLUS_STRING_IO
#undef INCLUDE_CPLUS_STRING
#undef INCLUDE_CPLUS_IOSTREAMS
#undef INCLUDE_CPLUS_IOSTREAMS_FULL
/* Floating point */
#undef INCLUDE_HW_FP /* No floating point unit in PPC405 core */
/* Kernel utilities */
#define INCLUDE_TASK_HOOKS
/*
* Other defines not part of standard Wind River BSPs:
* INCLUDE_STANDARD_WARMBOOT should be defined if a warm boot follows
* traditional means. If SystemACE is part of the system, then there is
* an option to warm boot from that device. See sysToMonitor() in sysLib.c.
*
* INCLUDE_CSP_BOOT_ERROR_LOG is a feature that logs errors encountered
* by CSP init routines.
*
* MAX_CSP_BOOT_ERROR_RECORDS is the maximum number of boot error log
* entries to maintain.
*
*/
#define INCLUDE_STANDARD_WARMBOOT
#define INCLUDE_CSP_BOOT_ERROR_LOG
#define MAX_CSP_BOOT_ERROR_RECORDS 5
/*
* User application initialization
*
* USER_APPL_INIT must be a valid C statement or block. It is
* included in the usrRoot() routine only if INCLUDE_USER_APPL is
* defined. The code for USER_APPL_INIT is only an example. The
* user is expected to change it as needed. The use of taskSpawn
* is recommended over direct execution of the user routine.
*
* Only use the USER_APPL_INIT macro for non-project builds as Tornado
* redefines usrAppInit() which will cause a linker error.
*/
#define INCLUDE_USER_APPL
#ifndef PRJ_BUILD
#define USER_APPL_INIT \
{ \
IMPORT int usrAppInit(); \
taskSpawn ("usrApp", 30, 0, 5120, \
usrAppInit, 0x1, 0x2, 0x3, 0,0,0,0,0,0,0); \
}
#endif
#include "ppc405_0.h"
#endif /* INCconfigh */
#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif