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1 AVR Product Family
1.1 Introduction
tinyAVR
The ATtiny product family is priced at less than a dollar in high volume, and offers an unrivaled combination of price, performance and flexibility. All devices in this family are highly integrated in small packages, with small die sizes and low to medium pin counts, thus signifiCANtly reducing the system cost.
They use the same AVR core architecture as the ATmega family. The devices are generally available in PDIP, SOIC, and Die options.
The ATtiny product family is targeting the high volume consumer market, for both standard and application specific device types. New members of this family, including ATtiny13, ATtiny26 and ATtiny2313, have differential features, such as A/D with gain stage, high frequency PWM with PLL(高速PWM输出), and integrated SRAM and EEPROM.
ATtiny13 would be the upgrade path for both ATtiny11 and ATtiny12, so does ATtiny2313 to AT90S1200 and AT90S2313. In addition, both ATtiny13 and ATtiny2313 have debugWIRE (解决新TINY的仿真问题).for on-chip debug via one I/O pin, and achieve higher CPU Clock Speed: up to 24 MHz (TINY也高速)for 2.7-5.5V operation and up to 12 MHz for 1.8-5.5V operation.
megaAVR
ATmega Product Family is based on the Self-programming Flash memory, designed to support applications requiring remote programming or field upgrades. The CPU has read-while-write capabilities and is able to program or reprogram the Flash block via the SPI, USART, or 2-wire interface (TWI) (TWI其实就是I2C)while application code is executing in the boot block. The family competes against 16 and 32-bit architectures
because of its high-density code and performance. It is a complete family with 4 to 128K Bytes Flash devices.
All ATmega devices with 16K or more Flash memory will have either IEEE 1149.1 Compliant JTAG Interface or debugWIRE for on-chip debug. Small devices like ATmega48/88/168, instead, will only have debugWIRE available(解决MEGA8的仿真问题).
Specifically designed for the latest battery operated and portable applications, ATmega48/88/168,ATmega162, ATmega169 and all future ATmega devices CAN be operated by very low power at 1.8V(可以1.8-5.5V宽压工作). In addition, all future ATmega devices are targeting higher CPU Clock Speed: up to 24 MHz for 2.7-5.5V operation(具有更快的速度!) and up to 12 MHz for 1.8-5.5V operation.
Aside from the basic features, more peripheral features such as LCD driver and CAN interface are considered to be integrated on chip, in order to broaden the profile of the ATmega Family. The ATmega169 is the first AVR device that comes with 4*25 segments on-chip LCD driver(首款带有LCD驱动的超低功耗AVR,如不用LCD功能,可作多I/O口的AVR使用), and the ATmega128CAN11 will be the first AVR device with the single CAN interface(首款带有CAN的AVR芯片). 答 1: 有货就是好东西
1.1 Introduction
tinyAVR
The ATtiny product family is priced at less than a dollar in high volume, and offers an unrivaled combination of price, performance and flexibility. All devices in this family are highly integrated in small packages, with small die sizes and low to medium pin counts, thus signifiCANtly reducing the system cost.
They use the same AVR core architecture as the ATmega family. The devices are generally available in PDIP, SOIC, and Die options.
The ATtiny product family is targeting the high volume consumer market, for both standard and application specific device types. New members of this family, including ATtiny13, ATtiny26 and ATtiny2313, have differential features, such as A/D with gain stage, high frequency PWM with PLL(高速PWM输出), and integrated SRAM and EEPROM.
ATtiny13 would be the upgrade path for both ATtiny11 and ATtiny12, so does ATtiny2313 to AT90S1200 and AT90S2313. In addition, both ATtiny13 and ATtiny2313 have debugWIRE (解决新TINY的仿真问题).for on-chip debug via one I/O pin, and achieve higher CPU Clock Speed: up to 24 MHz (TINY也高速)for 2.7-5.5V operation and up to 12 MHz for 1.8-5.5V operation.
megaAVR
ATmega Product Family is based on the Self-programming Flash memory, designed to support applications requiring remote programming or field upgrades. The CPU has read-while-write capabilities and is able to program or reprogram the Flash block via the SPI, USART, or 2-wire interface (TWI) (TWI其实就是I2C)while application code is executing in the boot block. The family competes against 16 and 32-bit architectures
because of its high-density code and performance. It is a complete family with 4 to 128K Bytes Flash devices.
All ATmega devices with 16K or more Flash memory will have either IEEE 1149.1 Compliant JTAG Interface or debugWIRE for on-chip debug. Small devices like ATmega48/88/168, instead, will only have debugWIRE available(解决MEGA8的仿真问题).
Specifically designed for the latest battery operated and portable applications, ATmega48/88/168,ATmega162, ATmega169 and all future ATmega devices CAN be operated by very low power at 1.8V(可以1.8-5.5V宽压工作). In addition, all future ATmega devices are targeting higher CPU Clock Speed: up to 24 MHz for 2.7-5.5V operation(具有更快的速度!) and up to 12 MHz for 1.8-5.5V operation.
Aside from the basic features, more peripheral features such as LCD driver and CAN interface are considered to be integrated on chip, in order to broaden the profile of the ATmega Family. The ATmega169 is the first AVR device that comes with 4*25 segments on-chip LCD driver(首款带有LCD驱动的超低功耗AVR,如不用LCD功能,可作多I/O口的AVR使用), and the ATmega128CAN11 will be the first AVR device with the single CAN interface(首款带有CAN的AVR芯片). 答 1: 有货就是好东西
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