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定点小数的VHDL实现

工程师
2007-04-26 22:38:05     打赏
定点小数的VHDL实现

如何在FPGA中实现1.164*16的小数乘法运算?????
现在要进行视频数据YUV转RGB,转换公式中有小数乘法运算,好像浮点数运算不能综合,不知如何实现????
转换公式如下:
R=1.164*(Y-16)+1.596*(Cr-128)
G=1.164*(Y-16)-0.813*(Cr-128)-0.392*(Cb-128)
B=1.164*(Y-16)+1.596*(Cr-128)
从本网站上下载一个YUV转RGB的代码如下,请高手分析一下是如何实现的?谢谢!!
module YCrCb2RGB ( R, G, B, clk, rst, Y, Cr, Cb );
/*
R=1.164*(Y-16)+1.596*(Cr-128)
G=1.164*(Y-16)-0.813*(Cr-128)-0.392*(Cb-128)
B=1.164*(Y-16)+1.596*(Cr-128)
*/
output [7:0] R, G, B;

input clk,rst;
input[9:0] Y, Cr, Cb;

wire [7:0] R,G,B;
reg [20:0] R_int,G_int,B_int,X_int,A_int,B1_int,B2_int,C_int;
reg [9:0] const1,const2,const3,const4,const5;
reg[9:0] Y_reg, Cr_reg, Cb_reg;

//registering constants
always @ (posedge clk)
begin
const1 = 10'b 0100101010; //1.164 = 01.00101010
const2 = 10'b 0110011000; //1.596 = 01.10011000
const3 = 10'b 0011010000; //0.813 = 00.11010000
const4 = 10'b 0001100100; //0.392 = 00.01100100
const5 = 10'b 1000000100; //2.017 = 10.00000100
end

always @ (posedge clk or posedge rst)
if (rst)
begin
Y_reg <= 0; Cr_reg <= 0; Cb_reg <= 0;
end
else
begin
Y_reg <= Y; Cr_reg <= Cr; Cb_reg <= Cb;
end

always @ (posedge clk or posedge rst)
if (rst)
begin
A_int <= 0; B1_int <= 0; B2_int <= 0; C_int <= 0; X_int <= 0;
end
else
begin
X_int <= (const1 * (Y_reg - 'd64)) ;
A_int <= (const2 * (Cr_reg - 'd512));
B1_int <= (const3 * (Cr_reg - 'd512));
B2_int <= (const4 * (Cb_reg - 'd512));
C_int <= (const5 * (Cb_reg - 'd512));
end

always @ (posedge clk or posedge rst)
if (rst)
begin
R_int <= 0; G_int <= 0; B_int <= 0;
end
else
begin
R_int <= X_int + A_int;
G_int <= X_int - B1_int - B2_int;
B_int <= X_int + C_int;
end
/* limit output to 0 - 4095, <0 equals o and >4095 equals 4095 */
assign R = (R_int[20]) ? 0 : (R_int[19:18] == 2'b0) ? R_int[17:10] : 8'b11111111;
assign G = (G_int[20]) ? 0 : (G_int[19:18] == 2'b0) ? G_int[17:10] : 8'b11111111;
assign B = (B_int[20]) ? 0 : (B_int[19:18] == 2'b0) ? B_int[17:10] : 8'b11111111;

endmodule const1 = 10'b 0100101010; //1.164 = 01.00101010
const2 = 10'b 0110011000; //1.596 = 01.10011000
const3 = 10'b 0011010000; //0.813 = 00.11010000
const4 = 10'b 0001100100; //0.392 = 00.01100100
const5 = 10'b 1000000100; //2.017 = 10.00000100


这是关键的几句,其实就是把小数点去掉,用二进制表示数



关键词: 定点     小数     实现    

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