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蜂鸣器--报警
源码：
顶层
module aaa(
 input sysClk,
 input sysReset,
 input [7:0]key,
 output [7:0] led,
 output buzzer
);
parameter DELAY = 150_000;
reg [31:0] delay_cnt = 0;
always @(posedge sysClk,negedge sysReset)
begin
 if(!sysReset)
  delay_cnt <= 32'd0;
 else if(delay_cnt >= DELAY)
  delay_cnt <= 32'd0;
 else
  delay_cnt <= delay_cnt + 1'b1;
end
parameter lf_cnt = 14_285;
parameter rt_cnt = 27_000;
reg [21:0] chCnt = 27_000;
reg chEn = 0;
reg opt = 0;// 0:-,1:+;
always @(posedge sysClk,negedge sysReset)
begin
 if(!sysReset)
 begin
  opt = 0;
  chCnt = 27_000;
 end
 else if(delay_cnt >= DELAY)
 begin
  chEn <= 1'b1;
  if(opt == 0)
  begin
   chCnt <= chCnt - 254;
   if((chCnt - 254) <= lf_cnt)
   begin
    opt <= 1'b1;
    chCnt <= lf_cnt;
   end
  end
  else
  begin
   chCnt <= chCnt + 254;
   if((chCnt + 254) <= rt_cnt)
   begin
    opt <= 1'b0;
    chCnt <= rt_cnt;
   end
  end
 end
 else
  chEn <= 1'b0;
end
//
wire buzzer_d;
gener_fre gf(
 .clk(sysClk),
 .fre_cnt(chCnt),
 .fre_en(chEn),
 .fre_o(buzzer)
);
endmodule
频率生成模块
module gener_fre(
 input clk,
 input [21:0] fre_cnt,
 input fre_en,
 output fre_o
);
reg [20:0] fre_cnt_d = 25_000;
always @(posedge clk)
begin
 if(fre_en)
  fre_cnt_d <= fre_cnt[21:1];
end
reg [20:0] timer = 0;
always @(posedge clk)
begin
 if(fre_en)
   timer <= 22'd0;
 else if(timer >= fre_cnt_d)
 begin
  timer <= 22'd0;
 end
 else
  timer <= timer + 1'b1;
end
reg fre_d = 0;
always @(posedge clk)
begin
 if(timer >= fre_cnt_d)
  fre_d <= ~fre_d;
end
assign fre_o = fre_d;
endmodule
产生0.1s的周期的1.8k到3.5k的均匀变化的频率