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视频地址：http://www.tudou.com/v/vJGDxEh1FbU/&resourceId=0_05_02_99&autoPlay=true/v.swf

------数码管动态显示，模块清晰，显示效果为4320dcba

module seg7x8(
  input        CLOCK_50,                // 板载50MHz时钟
  input        Q_KEY,                   // 板载按键RST
  output [7:0] SEG7_SEG,                // 七段数码管 段脚             
  output [7:0] SEG7_SEL                 // 七段数码管 待译位脚
);

seg7x8_drive u0(
  .i_clk(CLOCK_50),
  .i_rst_n(Q_KEY),
 
  .i_turn_off(8'b0000_0000),         
  .i_dp      (8'b0000_0100),            
  .i_data   (32'h4320_DCBA),            
  
  .o_seg(SEG7_SEG),
  .o_sel(SEG7_SEL)
);

endmodule


module seg7x8_drive(
  input         i_clk,
  input         i_rst_n,
 
  input  [7:0]  i_turn_off,             
  input  [7:0]  i_dp,                   
  input  [31:0] i_data,                 
  
  output [7:0]  o_seg,                  
  output [7:0]  o_sel                  
);

//++++++++++++++++++++++++++++++++++++++
// 分频部分 开始
//++++++++++++++++++++++++++++++++++++++
reg [16:0] cnt;                         // 计数子

always @ (posedge i_clk, negedge i_rst_n)
  if (!i_rst_n)
    cnt <= 0;
  else
    cnt <= cnt + 1'b1;

wire seg7_clk = cnt[16];                // (2^17/50M = 2.6114)ms
//--------------------------------------
// 分频部分 结束
//--------------------------------------

//++++++++++++++++++++++++++++++++++++++
// 动态扫描, 生成seg7_addr 开始
//++++++++++++++++++++++++++++++++++++++
reg [2:0]  seg7_addr;                   // 第几个seg7

always @ (posedge seg7_clk, negedge i_rst_n)
  if (!i_rst_n)
    seg7_addr <= 0;
  else
    seg7_addr <= seg7_addr + 1'b1;     
//--------------------------------------
// 动态扫描, 生成seg7_addr 结束
//--------------------------------------

//++++++++++++++++++++++++++++++++++++++
// 根据seg7_addr, 译出位码 开始
//++++++++++++++++++++++++++++++++++++++
reg [7:0] o_sel_r;                      // 位选码寄存器

always
  case (seg7_addr)
    0 : o_sel_r = 8'b11111110;               // SEG7[7]
    1 : o_sel_r = 8'b11111101;               // SEG7[6]
    2 : o_sel_r = 8'b11111011;               // SEG7[5]
    3 : o_sel_r = 8'b11110111;               // SEG7[4] 
    4 : o_sel_r = 8'b11101111;               // SEG7[3]
    5 : o_sel_r = 8'b11011111;               // SEG7[2]
    6 : o_sel_r = 8'b10111111;               // SEG7[1]
    7 : o_sel_r = 8'b01111111;               // SEG7[0]
  endcase
//--------------------------------------
// 根据seg7_addr, 译出位码 结束
//--------------------------------------

//++++++++++++++++++++++++++++++++++++++
// 根据seg7_addr, 选择熄灭码 开始
//++++++++++++++++++++++++++++++++++++++
reg turn_off_r;                         // 熄灭码

always
  case (seg7_addr)
    0 : turn_off_r = i_turn_off[0];
    1 : turn_off_r = i_turn_off[1];
    2 : turn_off_r = i_turn_off[2];
    3 : turn_off_r = i_turn_off[3];
    4 : turn_off_r = i_turn_off[4];
    5 : turn_off_r = i_turn_off[5];
    6 : turn_off_r = i_turn_off[6];
    7 : turn_off_r = i_turn_off[7];
  endcase
//--------------------------------------
// 根据seg7_addr, 选择熄灭码 结束
//--------------------------------------

//++++++++++++++++++++++++++++++++++++++
// 根据seg7_addr, 选择小数点码 开始
//++++++++++++++++++++++++++++++++++++++
reg dp_r;                               // 小数点码

always
  case (seg7_addr)
    0 : dp_r = i_dp[0];
    1 : dp_r = i_dp[1];
    2 : dp_r = i_dp[2];
    3 : dp_r = i_dp[3];
    4 : dp_r = i_dp[4];
    5 : dp_r = i_dp[5];
    6 : dp_r = i_dp[6];
    7 : dp_r = i_dp[7];
  endcase
//--------------------------------------
// 根据seg7_addr, 选择小数点码 结束
//--------------------------------------

//++++++++++++++++++++++++++++++++++++++
// 根据seg7_addr, 选择待译段码 开始
//++++++++++++++++++++++++++++++++++++++
reg [3:0] seg_data_r;                   always
  case (seg7_addr)
    0 : seg_data_r = i_data[3:0];
    1 : seg_data_r = i_data[7:4];
    2 : seg_data_r = i_data[11:8];
    3 : seg_data_r = i_data[15:12];
    4 : seg_data_r = i_data[19:16];
    5 : seg_data_r = i_data[23:20];
    6 : seg_data_r = i_data[27:24];
    7 : seg_data_r = i_data[31:28];
  endcase

reg [7:0] o_seg_r;                      
always @ (posedge i_clk, negedge i_rst_n)
  if (!i_rst_n)
    o_seg_r <= 8'hFF;                   
  else
    if(turn_off_r)                      
      o_seg_r <= 8'hFF;
    else
      if(!dp_r)
        case(seg_data_r)                
          4'h0 : o_seg_r <= 8'hC0;
          4'h1 : o_seg_r <= 8'hF9;
          4'h2 : o_seg_r <= 8'hA4;
          4'h3 : o_seg_r <= 8'hB0;
          4'h4 : o_seg_r <= 8'h99;
          4'h5 : o_seg_r <= 8'h92;
          4'h6 : o_seg_r <= 8'h82;
          4'h7 : o_seg_r <= 8'hF8;
          4'h8 : o_seg_r <= 8'h80;
          4'h9 : o_seg_r <= 8'h90;
          4'hA : o_seg_r <= 8'h88;
          4'hB : o_seg_r <= 8'h83;
          4'hC : o_seg_r <= 8'hC6;
          4'hD : o_seg_r <= 8'hA1;
          4'hE : o_seg_r <= 8'h86;
          4'hF : o_seg_r <= 8'h8E;
        endcase
      else
        case(seg_data_r)                
          4'h0 : o_seg_r <= 8'hC0 ^ 8'h80;
          4'h1 : o_seg_r <= 8'hF9 ^ 8'h80;
          4'h2 : o_seg_r <= 8'hA4 ^ 8'h80;
          4'h3 : o_seg_r <= 8'hB0 ^ 8'h80;
          4'h4 : o_seg_r <= 8'h99 ^ 8'h80;
          4'h5 : o_seg_r <= 8'h92 ^ 8'h80;
          4'h6 : o_seg_r <= 8'h82 ^ 8'h80;
          4'h7 : o_seg_r <= 8'hF8 ^ 8'h80;
          4'h8 : o_seg_r <= 8'h80 ^ 8'h80;
          4'h9 : o_seg_r <= 8'h90 ^ 8'h80;
          4'hA : o_seg_r <= 8'h88 ^ 8'h80;
          4'hB : o_seg_r <= 8'h83 ^ 8'h80;
          4'hC : o_seg_r <= 8'hC6 ^ 8'h80;
          4'hD : o_seg_r <= 8'hA1 ^ 8'h80;
          4'hE : o_seg_r <= 8'h86 ^ 8'h80;
          4'hF : o_seg_r <= 8'h8E ^ 8'h80;
        endcase
assign o_sel = o_sel_r;                 
assign o_seg = o_seg_r;                

endmodule

-----拨码开关控制LED点亮，
module sw_led(
  input  [8:1] SW,                      
  output [8:1] LED                     
);   

assign LED = SW;

endmodule
——回复可见内容——

------花样彩灯，本代码由版主提供，具体效果看后续视频

module led_run(sys_clk,led);
input sys_clk;
output [7:0]led;
reg    [7:0]led;
reg    [24:0]count;
reg    [4:0]state;
wire   clk;
 
always @(posedge sys_clk)
count<=count+1'b1;
assign clk=count[23];

always @(posedge clk )
begin
case(state)
5'b00000: led=8'b1111_1111;
5'b00001: led=8'b0000_0000;
5'b00010: led=8'b1000_0000;
5'b00011: led=8'b1100_0000;
5'b00100: led=8'b1110_0000;
5'b00101: led=8'b1111_0000;
5'b00110: led=8'b1111_1000;
5'b00111: led=8'b1111_1100;
5'b01000: led=8'b1111_1110;
5'b01001: led=8'b1111_1111;
5'b01010: led=8'b0000_0000;
5'b01011: led=8'b1111_1111;
5'b01100: led=8'b0000_0001;
5'b01101: led=8'b0000_0010;
5'b01110: led=8'b0000_0100;
5'b01111: led=8'b0000_1000;
5'b10000: led=8'b0001_0000;
5'b10001: led=8'b0010_0000;
5'b10010: led=8'b0100_0000;
5'b10011: led=8'b1000_0000;
5'b10100: led=8'b1111_1111;
5'b10101: led=8'b0000_0000;
5'b10110: led=8'b1111_1111;
5'b10111: led=8'b1000_0001;
5'b11000: led=8'b1100_0011;
5'b11001: led=8'b1110_0111;
5'b11010: led=8'b1111_1111;
5'b11011: led=8'b0001_1000;
5'b11100: led=8'b0011_1100;
5'b11101: led=8'b0111_1110;
5'b11110: led=8'b1111_1111;
5'b11111: led=8'b0000_0000;
endcase
state=state+1;
end
endmodule

-------PWM波控制LED灯的亮暗程度，长按按键1，灯由暗逐渐变亮，长按按键2，灯由亮逐渐--------变暗，如此反复


module Pwm_LED(clk,key,led);
input clk;        -------系统时钟
input [1:0]key;--------定义按键1,2
output [7:0]led;--------定义8盏LED灯
reg [32:0]count;
reg [9:0]pwm_count;
reg flag;
reg [7:0]pwm_flag;
always @(posedge clk)
begin
count=count+1'b1;
if(count[13:4]<pwm_count)
pwm_flag=8'b11111111;
 else
 pwm_flag=8'b00000000;
   if(count[15]==1'b1)
begin
 if(flag==1'b1)
begin
  flag=1'b0;
    if(key[0]==1'b0)
     pwm_count=(pwm_count+10'b0000000001);
else if(key[1]==1'b0)
      pwm_count=(pwm_count-10'b0000000001);
else pwm_count=pwm_count;
    end
  end
else
flag=1'b1;
end
assign led=pwm_flag;
endmodule

干的很好！！！！

感谢夸奖，我会继续努力

bucuo