This application note describes a Configurable Physical Coding Sublayer (CPCS) reference design that extends the functionality of the Xilinx® RocketIO™ multi-gigabit transceiver (MGT) blocks in the Virtex™-II Pro FPGA family. This product is not recommended for new designs.
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Configurable Physical Coding Sublayer - Not Recommended for New Designs
关键词： Configurable Physical Cod
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