EEPW论坛

穷学生一枚，没有单反，没有卡片机。也没有智能拍照手机。只有可打电话的破手机。
平时都不会看过的相机，今天就拿来将就拍两张吧。权当作有图有真相吧。

核心板：


接口板：

与君共勉~

其实两块板都挺好看，只是本人条件有限，没能拍出高清的微距而已啦。

        好久没更新帖子了，今天更新一下吧。
        国庆前就收到PCB并焊接完成了，但是没有检查芯片引脚是否粘连，电源是否短路等。等过完了国庆，收假回来后检查发现，可能是因为过孔没有添加阻焊的原因，芯片的引脚内部有多处粘连在一起，然后进行了修复。由于第一次焊接这么高密度的芯片，事先也没有充分查阅相关的焊接视频，在修复的过程中因用力过猛以致于与SDRAM连接的一个引脚断开了，也由于刚接触FPGA，不知道断开的引脚对FPGA有什么影响？是否还能使用等，同时也在修复过程中导致几个焊盘发生移位或者轻微的翘起，也不清楚是否断开，所以就把原先焊接的板子先搁置一边了，等有时间或者跟论坛活动学习完后有一定的基础再回过头来研究研究。所以，为了赶跟得上论坛活动的进度，就重新下单购买新的PCB板了，可能是国庆放假的原因，版主那的芯片到货延误了，等到我下单收到货又过一周的时间，转眼间一个月的时间就这么过去了。       
        前几天收到新的PCB后就马上开始焊接了，吸取了前一次的焊接经验，在网上查阅了相关的焊接视频以及论坛中焊接的注意事项，很快就把FPGA芯片给焊接上去了，看了一下引脚还算比较对齐。然后焊接其他的器件后检查了是否短路，引脚是否还有粘连的，就直接上电测试。下载了论坛中版主的测试文件，还算比较顺利，一切都OK！ 
        没有相见，下面就简单的附一张手机照的焊接完成相片吧！
 

    8个LED先闪烁几次，然后依次从左到右点亮，从右至左点亮，从左至右连续点亮，从右至左连续点亮。

需要说明的的是上传的sof，使用的是Y1的晶振。

led_run.rar

//
module led_run(sys_clk,sys_rstn,led);

input sys_clk;
input sys_rstn;

output reg [7:0]led;

//计数器
reg [25:0]cnt; 
always@(posedge sys_clk )
begin
    if(cnt==26'd49999999)
    cnt<=26'd0;
   else
    cnt<=cnt+1'd1;
end
//1Hz
reg clk_1s;
always@(posedge sys_clk )
begin
    if(cnt<=26'd25000000)
        clk_1s<=1'd0;
    else
        clk_1s<=1'd1;
end

parameter start=8'd0;
parameter   right_set=8'd1;
parameter shift_right=8'd2;
parameter   run_right=8'd3;
parameter   left_set=8'd4;
parameter   shift_left=8'd5;
parameter   run_left=8'd6;


reg [25:0]delay_cnt;
reg [7:0] state;
always@(posedge clk_1s or negedge sys_rstn)
begin
    if(!sys_rstn)
    begin
        delay_cnt<=25'd0;
        led<=8'b0000_0000;
        state<=8'd0;
     end
    else
        begin
            delay_cnt<=delay_cnt+1'd1;
            case(state)
            start:begin 
                        led=~led;
                        if(delay_cnt==25'd5)
                            begin
                            state<=right_set;
                            delay_cnt<=25'd0;
                            end
                        else
                            state<=start;
                      end
            right_set:begin
                            led<=8'b1111_1110;
                            state<=shift_right;
                            delay_cnt<=25'd0;
                            end
            shift_right:begin
                            led<={led[6:0],led[7]};
                            if(delay_cnt==25'd6)
                                begin
                                   state<=shift_left;
                                   delay_cnt<=25'd0;
                                end
                            else
                                state<=shift_right;
                            end
            shift_left:begin
                            led<={led[0],led[7:1]};
                            if(delay_cnt==25'd6)
                                begin
                                    state<=run_right;
                                    delay_cnt<=25'd0;
                                end
                            else
                                state<=shift_left;
                            end
            run_right:begin
                            led<=led<<1;
                            if(delay_cnt==25'd6)
                                begin
                                    state<=left_set;
                                    delay_cnt<=25'd0;
                                end
                            else
                                state<=run_right;
                            end
                left_set:begin
                                led<=8'b0111_1111;
                                state<=run_left;
                                delay_cnt<=25'd0;
                            end
               run_left:begin
                            led<=led>>1;
                            if(delay_cnt==25'd6)
                                begin
                                    state<=start;
                                    delay_cnt<=25'd0;
                                end
                            else
                                state<=run_left;
                            end
                endcase
        end
end

endmodule

key_debounce.rar

//功能说明

//按键消抖、有按键时8个LED灯翻转、按S1数码管显示数据减一，按S2数码管显示数据加一
module key_debounce(clk,rst_n,
                                key,
                                smg_cs,smg_db,
                                led
                                );

input clk;
input rst_n;
input [1:0]key;

output [7:0]smg_cs;
output [7:0]smg_db;
output [7:0]led;

reg [1:0]key_rst;
always@(posedge clk or negedge rst_n)
begin
    if(!rst_n)
        key_rst<=2'b11;
    else
        key_rst<=key;
end



reg [1:0]key_rst_r;
always@(posedge clk or negedge rst_n)
begin
    if(!rst_n)
        key_rst_r<=2'b11;
    else
        key_rst_r<=key_rst;
end

wire  [1:0]key_an=key_rst_r&~key_rst;

reg  [19:0]cnt;
always@(posedge clk or negedge rst_n)
begin
        if(!rst_n)
            cnt<=20'b0;
        else
            if(key_an)
                cnt<=20'b0;
            else
                cnt<=cnt+1'b1;
end
/***********************************************************/
reg [1:0]key_low;
always@(posedge clk or negedge rst_n)
begin
    if(!rst_n)
        key_low<=2'b11;
    else
        if(cnt==20'hffffff)
        key_low<=key;
end

reg [1:0]key_low_r;
always@(posedge clk or negedge rst_n)
begin
        if(!rst_n)
            key_low_r<=2'b11;
        else 
            key_low_r<=key_low;
end

wire [1:0]key_en=key_low_r[1:0]&(~key_low[1:0]);

reg [3:0]num;
reg d1;
always@(posedge clk or negedge rst_n)
begin
        if(!rst_n)
        begin
            num<=4'h0;
            d1<=1'b0;
        end
        else
            begin
                if(key_en[1])
                begin
                    d1<=~d1;
                    num<=num+1'b1;
                end
                if(key_en[0])
                begin
                    d1<=~d1;
                    num<=num-1'b1;
                end
            end
end
/**************************************************************/
//数码管
/*
共阳数码管表   0     1     2     3     4     5     6     7    
0xc0  0xf9  0xa4  0xb0  0x99  0x92  0x82  0xf8

8     9     a      b     c     d     e     f 
0x80  0x90  0x88   0x83  0xc6  0xa1  0x86  0x8e

*/
//段选参数

parameter seg0 = 8'hc0,
seg1 = 8'hf9,
seg2 = 8'ha4,
seg3 = 8'hb0,
seg4 = 8'h99,
seg5 = 8'h92,
seg6 = 8'h82,
seg7 = 8'hf8,
seg8 = 8'h80,
seg9 = 8'h90,
sega = 8'h88,
segb = 8'h83,
segc = 8'hc6,
segd = 8'ha1,
sege = 8'h86,
segf = 8'h8e,
segg = 8'hbf; //   "-" 
 
reg [7:0]smg_db_r;
always@(num)
begin
    case(num)
        4'h0 : smg_db_r<=seg0;
        4'h1 : smg_db_r<=seg1;
        4'h2 : smg_db_r<=seg2;
        4'h3 : smg_db_r<=seg3;
        4'h4 : smg_db_r<=seg4;
        4'h5 : smg_db_r<=seg5;
        4'h6 : smg_db_r<=seg6;
        4'h7 : smg_db_r<=seg7;
        4'h8 : smg_db_r<=seg8;
        4'h9 : smg_db_r<=seg9;
        4'ha : smg_db_r<=sega;
        4'hb : smg_db_r<=segb;
        4'hc : smg_db_r<=segc;
        4'hd : smg_db_r<=segd;
        4'he : smg_db_r<=sege;
        4'hf : smg_db_r<=segf;
        default:smg_db_r<=segg;
    endcase
end

assign led=d1?8'b1111_1111:8'b0000_0000;
assign smg_cs=8'b0000_0000;
assign smg_db=smg_db_r;

endmodule