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Deglitching Techniques for High-Voltage R-2R DACs


关键词: Deglitching Techniques for High-Voltage R-2R DACs 


In an R-2R DAC design with supply voltages exceeding ±5V, large voltage glitches (up to 1.5V) can occur during the DAC's major-carry transitions. These glitches can propagate through the output buffer amplifier and appear at output. The slewing of the level shifters that control the top (V_REF+) and bottom (V_REF-) single-pole double-throw switches (S₀ to S_N) causes the glitches



 Deglitching Techniques for High-Voltage R-2R DACs.pdf