【应用手册】Combining Multiple Configuration Schemes
This application note describes how to configure Altera® FPGAs using multiple
configuration schemes on the same board.
Combining JTAG configuration with passive serial (PS) or active serial (AS)
configuration on your board is useful in the prototyping environment because it
allows multiple methods to configure your FPGA. For example, if your production
environment calls for PS configuration using a configuration device, you must
reprogram your configuration device every time you wanted to test a design change
in your FPGA. If you include the FPGA in the same JTAG chain as the configuration
device, the FPGA can be reconfigured using JTAG without having to reprogram the
configuration device.
an656.pdf
我要赚赏金打赏帖 |
|
|---|---|
| 片外存储Flash使用方法(Arduino IDE环境)被打赏¥22元 | |
| 三分钟快速上手ESP-NOW(ArduinoIDE环境)被打赏¥23元 | |
| 【S32K3XX】LPSPI参数配置说明被打赏¥21元 | |
| 在WT9932C61-TINY上实现超声波测距被打赏¥22元 | |
| 基于WT9932C61-TINY的环境构建及OLED屏驱动测试被打赏¥20元 | |
| 【S32K3XX】Core-to-Core 中断使用被打赏¥21元 | |
| 「AI编程记录--含源码」用一晚上的时间写一个esp32的示波器被打赏¥19元 | |
| STM32C0116DK开发探索记(3)被打赏¥30元 | |
| STM32C0116DK开发探索记(2)被打赏¥24元 | |
| STM32C0116DK开发探索记(1)被打赏¥29元 | |
我要赚赏金
