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问题1：PCB既可以焊接EP2C5Q208C8N也可以焊接EP2C8Q208C8N，本电路的设计是兼容 EP2C5Q208 和 EP2C8Q208 两款 FPGA 芯片，它们的区别在于是有 4 个管脚的定义不同。

本电路模块使用 EP2C8 器件时，这四个引脚不能作为 IO 使用，切忌！ 
问题2：只要是HY57V641620的SDRAM都可以，HY57V641602FTP-9。HY57V641602FTP-7，HY57V641602FTP-H，具体区别看手册！

看了手册是HY57V641620FTP-6  -7  -H
5*7 贴片有源晶振是用多大的？材料表上没有

5*7 贴片有源晶振，大小就是5*7 呀！

喔 不好意思描述错误 是多少MHz

黑色的板子看上去非常高端，但副作用也是明显的，到底和旁边的过孔本来是通的还是不通的呢？可否提供核心板的顶底层独立图片（无丝印层）？方便快速核对。

开始写LED代码——静态
在这里开始出现2个警告。

总警告表里面内容如下，请教各位是如何解决的？
Warning: Output pins are stuck at VCC or GND
 Warning (13410): Pin "led[0]" is stuck at GND
 Warning (13410): Pin "led[1]" is stuck at VCC
 Warning (13410): Pin "led[2]" is stuck at GND
 Warning (13410): Pin "led[3]" is stuck at VCC
 Warning (13410): Pin "led[4]" is stuck at GND
 Warning (13410): Pin "led[5]" is stuck at VCC
 Warning (13410): Pin "led[6]" is stuck at GND
 Warning (13410): Pin "led[7]" is stuck at VCC
Warning: Found 8 output pins without output pin load capacitance assignment
 Info: Pin "led[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
 Info: Pin "led[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
 Info: Pin "led[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
 Info: Pin "led[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
 Info: Pin "led[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
 Info: Pin "led[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
 Info: Pin "led[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
 Info: Pin "led[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Warning: Following 8 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results
 Info: Pin led[0] has GND driving its datain port
 Info: Pin led[1] has VCC driving its datain port
 Info: Pin led[2] has GND driving its datain port
 Info: Pin led[3] has VCC driving its datain port
 Info: Pin led[4] has GND driving its datain port
 Info: Pin led[5] has VCC driving its datain port
 Info: Pin led[6] has GND driving its datain port
 Info: Pin led[7] has VCC driving its datain port
Warning: No paths found for timing analysis

发现一个问题，不能确定是芯片还是代码问题，故请教各位大侠。
按S5到S8异常出现的多（要反复多按几次，有时候按了不下二十几次），异常现象是D9和D10灯亮了其它灯灭。按S1看不出来。按S2-S4出现的概率小的多（偶尔出现异常情况一样）。
代码如下：

module LED001 (sys_clk,sys_rstn,KEY_K2,KEY_K3,KEY_K4,KEY_K5,KEY_K6,KEY_K7,KEY_K8,led);

input sys_clk; //P27 CLK2 Y2
input sys_rstn; //P107 KEY1
input KEY_K2; //P110 KEY2
input KEY_K3; //P114 KEY3
input KEY_K4; //P113 KEY4
input KEY_K5; //P116 KEY5
input KEY_K6; //P115 KEY6
input KEY_K7; //P118 KEY7
input KEY_K8; //P117 KEY8
output [10:0] led;

reg [10:0] led;
reg [24:0] delay_cnt;
reg [3:0] mode;

always@(posedge sys_clk or negedge sys_rstn)
 begin
  if(!sys_rstn)
   begin
   delay_cnt<=25'd0;
   led =11'b11111111111;
   mode<=4'd0;
   end
  else
   begin
    if(!KEY_K2)mode<=4'd1;
    if(!KEY_K3)mode<=4'd2;
    if(!KEY_K4)mode<=4'd3;
    if(!KEY_K5)mode<=4'd4;
    if(!KEY_K6)mode<=4'd5;
    if(!KEY_K7)mode<=4'd6;
    if(!KEY_K8)mode<=4'd7;
    delay_cnt<=delay_cnt+1'd1;
    if(delay_cnt==25'd24999999)
     begin
     delay_cnt<=25'd0;
     case(mode)
     4'd0:led =11'b01111111110;
     4'd1:led =11'b10111111101;
     4'd2:led =11'b00111111011;
     4'd3:led =11'b11011110111;
     4'd4:led =11'b01011101111;
     4'd5:led =11'b10011011111;
     4'd6:led =11'b00010111111;
     4'd7:led =11'b11101111111;
     endcase
     end
   end
 end

endmodule

你这个程序没有按键防抖啊。。。