个人比较喜欢VHDL,所有的代码都准备用VHDL来写。
实验一的程序如下:
共2条
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abel371082的进程贴(VHDL)
2楼
实验二的源码
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY LED IS
PORT(
CLK_IN :IN STD_LOGIC; -- the input for clk of 50M
LED_CONTROL :OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END LED;
ARCHITECTURE BEHAVE OF LED IS
SIGNAL CLK_25M : STD_LOGIC;
SIGNAL CLK_NUM : STD_LOGIC_VECTOR(24 DOWNTO 0);--
SIGNAL LED : STD_LOGIC_VECTOR(7 DOWNTO 0);
BEGIN
PROCESS(CLK_IN) --the clk of 25M
BEGIN
IF CLK_IN'EVENT AND CLK_IN='1' THEN
CLK_25M<=NOT CLK_25M;
END IF;
END PROCESS;
PROCESS(CLK_25M) --the clk of 25M
BEGIN
IF CLK_25M'EVENT AND CLK_25M='1' THEN
CLK_NUM<=CLK_NUM+"0000000000000000000000001";
IF CLK_NUM = "0000000000000000000000000" THEN
LED<= NOT LED;
END IF;
END IF;
END PROCESS;
LED_CONTROL<=LED;
END;
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY LED IS
PORT(
CLK_IN :IN STD_LOGIC; -- the input for clk of 50M
LED_CONTROL :OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END LED;
ARCHITECTURE BEHAVE OF LED IS
SIGNAL CLK_25M : STD_LOGIC;
SIGNAL CLK_NUM : STD_LOGIC_VECTOR(24 DOWNTO 0);--
SIGNAL LED : STD_LOGIC_VECTOR(7 DOWNTO 0);
BEGIN
PROCESS(CLK_IN) --the clk of 25M
BEGIN
IF CLK_IN'EVENT AND CLK_IN='1' THEN
CLK_25M<=NOT CLK_25M;
END IF;
END PROCESS;
PROCESS(CLK_25M) --the clk of 25M
BEGIN
IF CLK_25M'EVENT AND CLK_25M='1' THEN
CLK_NUM<=CLK_NUM+"0000000000000000000000001";
IF CLK_NUM = "0000000000000000000000000" THEN
LED<= NOT LED;
END IF;
END IF;
END PROCESS;
LED_CONTROL<=LED;
END;
共2条
1/1 1 跳转至页
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