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按键篇的作业，交作业喽。

上升沿检测源代码:
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: Charles Wang 
// 
// Create Date:    06/12/2014 
// Design Name: 	trigger_pos
// Module Name:   trigger_pos
// Project Name: 	trigger_pos
// Target Devices: EP4CE6E22C8
// Tool versions: Quartus II 13.1 & Modelsim 10.1c
// Description: 上升沿检测
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module trigger_pos(clk,rst_n,trigger_in,pos_edge);

input clk;//50Mhz 总线时钟
input rst_n;//异步复位,低电平复位
input trigger_in;//待检测输入信号

output pos_edge;//上升沿输出信号

reg pos_edge;
//////////////////////////////////////////////////////////////////////////////////
reg trigger_buf1;//第一级输入信号寄存器
always@(posedge clk or negedge rst_n)
	begin
		if(!rst_n)
			trigger_buf1 <= 1'b0;
		else
			trigger_buf1 <= trigger_in;
	end
reg trigger_buf2;//第二级输入信号寄存器,为了减少毛刺
always@(posedge clk or negedge rst_n)
	begin
		if(!rst_n)
			trigger_buf2 <= 1'b0;
		else
			trigger_buf2 <= trigger_buf1;
	end
reg pos_edge_r;//输出信号寄存器
always@(posedge clk or negedge rst_n)
	begin
		if(!rst_n)
			pos_edge_r <= 1'b0;
		else
			pos_edge_r <= trigger_in & (~trigger_buf2);
	end
always@(posedge clk or negedge rst_n)
	begin
		if(!rst_n)
			pos_edge <= 1'b0;
		else 
			pos_edge <= pos_edge_r;
	end
endmodule

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: Charles Wang 
// 
// Create Date:    06/12/2014 
// Design Name: 	key_led
// Module Name:     key_led
// Project Name: 	key_led
// Target Devices: EP4CE6E22C8
// Tool versions: Quartus II 13.1 & Modelsim 10.1c
// Description: 按键消抖控制一位数码管循环显示0~9
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module key_led(clk,rst_n,key_in,led_bit,led_seg);

input clk;//总线时钟50MHZ
input rst_n;//异步复位,低电平复位
input key_in;//按键输入信号,低电平按下

output [7:0]led_seg;//LED数码管段选
output [7:0]led_bit;//LED数码管位选

reg [7:0]led_seg;
/////////////////////////////////////////////////////////////////////////////////
reg key_in_r;
always@(posedge clk or negedge rst_n)
	begin
		if(!rst_n)
			key_in_r <= 1'b1;
		else 
			key_in_r <= key_in;
	end
reg [19:0]debounce_cnt;
always@(posedge clk or negedge rst_n)//按键消抖部分
	begin
		if(!rst_n)
			debounce_cnt <= 20'h00000;
		else if(debounce_cnt == 20'hfffff)
			debounce_cnt <= 20'h00000;
		else
			debounce_cnt <= debounce_cnt + 1'b1;
	end
reg key_low;
always@(posedge clk or negedge rst_n)
	begin
		if(!rst_n)
			key_low <= 1'b1;
		else if(debounce_cnt == 20'hfffff)
			key_low <= (~key_in_r)|key_in;
		else
			key_low <= key_low;
	end
reg [3:0]counter;
always@(posedge clk or negedge rst_n)//0~9 计数器模块
	begin
		if(!rst_n)
			counter <= 4'b0000;
		else if(key_low == 1'b0)
			counter <= 4'b0000;
		else 
			counter <= counter + 1'b1;
	end
//////////////////////////////////////////////////////////////////////////////////
parameter//数码管显示定义
			seg0 = 8'hc0,   // "0"
			seg1 = 8'hf9,   // "1"
			seg2 = 8'ha4,   // "2"
			seg3 = 8'hb0,   // "3"
			seg4 = 8'h99,   // "4"
			seg5 = 8'h92,   // "5"
			seg6 = 8'h82,   // "6"
			seg7 = 8'hf8,   // "7"
			seg8 = 8'h80,   // "8"
			seg9 = 8'h90,   // "9"
			sega = 8'h88,   // "a"
			segb = 8'h83,   // "b"
			segc = 8'hc6,   // "c"
			segd = 8'ha1,   // "d"
			sege = 8'h86,   // "e"
			segf = 8'h8e;   // "f"
/////////////////////////////////////////////////////////////////////////////////
reg [7:0]led_seg_r;
always@(posedge clk or negedge rst_n)//数码管显示模块
	begin
		if(!rst_n)
			led_seg <= 8'hff;
		else 
			led_seg <= led_seg_r;
	end
always@(counter)//数码管显示
	begin
		case(counter)
			4'b0000: led_seg_r <= seg0;
			4'b0001: led_seg_r <= seg1;
			4'b0010: led_seg_r <= seg2;
			4'b0011: led_seg_r <= seg3;
			4'b0100: led_seg_r <= seg4;
			4'b0101: led_seg_r <= seg5;
			4'b0110: led_seg_r <= seg6;
			4'b0111: led_seg_r <= seg7;
			4'b1000: led_seg_r <= seg8;
			4'b1001: led_seg_r <= seg9;
			default: led_seg_r <= 8'hff;//默认不点亮LED数码管
		 endcase
	end
assign led_bit = 8'b1111_1110;//只选中一个LED 数码管显示
endmodule
			

0~9计数显示testbench源代码:
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: Charles Wang 
// 
// Create Date:    06/12/2014 
// Design Name: 	key_led_tb
// Module Name:  key_led_tb
// Project Name: key_led_tb
// Target Devices: EP4CE6E22C8
// Tool versions: Quartus II 13.1 & Modelsim 10.1c
// Description: 0`9按键消抖计数显示testbench
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module key_led_tb();

reg clk;
reg rst_n;
reg key_in;

wire [7:0]led_bit;
wire [7:0]led_seg;

key_led key(.clk(clk),.rst_n(rst_n),.key_in(key_in),.led_bit(led_bit),.led_seg(led_seg));
//////////////////////////////////////////////////////////////////////////////////
initial
  begin
    clk = 1'b0;
    #10 rst_n = 1'b0;
    #30 rst_n = 1'b1;
    forever
      #10 clk = ~ clk;
  end
initial
  begin
    key_in = 1'b0;
    #300000000    key_in = 1'b1;
    #300000000    key_in = 1'b0;
    #300000000    key_in = 1'b1;
    #300000000    key_in = 1'b0;
    #300000000    key_in = 1'b1;
    #300000000    key_in = 1'b0;
    #300000000    key_in = 1'b1;
    #300000000    key_in = 1'b0;
    #100000       key_in = 1'b1;
    #100000       key_in = 1'b0;
    #100000       key_in = 1'b1;
    #100000       key_in = 1'b0;
    #100000       key_in = 1'b1;
    #100000       key_in = 1'b0;
  end
endmodule

按键消抖计数显示波形：