这是我的第一块电路板,求高手指教啊。
第二张图中间部分是在生成PCB文件之后画上的直接加了一个网络地GND会不会有问题?第三个图是Design>option里面的设置,这个橘色是是DRC错误自己改成这色了,哪里不合适的请大家指导啊,
这是DRC检测里面的一部分错误,这个要怎么修改啊
Violation Net P14_0 is broken into 4 sub-nets. Routed To 72.73%
Subnet : S13-2 S13-2 S13-2
Subnet : S14-2 S14-2 S14-2
Subnet : S15-2 S15-2 S15-2
Subnet : S16-2 S16-2 S16-2
Violation Net XT2OUT_0 is broken into 3 sub-nets. Routed To 0.00%
Subnet : C3-2
Subnet : U2-52
Subnet : Y1-2
Violation Net XT2IN_0 is broken into 3 sub-nets. Routed To 0.00%
Subnet : Y1-1
Subnet : U2-53
Subnet : C4-2
Violation Net XOUT_0 is broken into 2 sub-nets. Routed To 0.00%
Subnet : Y2-1
Subnet : U2-9
Violation Net VREF+_0 is broken into 2 sub-nets. Routed To 0.00%
Subnet : C10-2
Subnet : U2-7
Violation Net TMS_0 is broken into 2 sub-nets. Routed To 0.00%
Subnet : U2-56
Subnet : JP1-5
Violation Net TDO_0 is broken into 2 sub-nets. Routed To 0.00%
Subnet : U2-54
Subnet : JP1-1
Violation Net TDI_0 is broken into 2 sub-nets. Routed To 0.00%
Subnet : U2-55
Subnet : JP1-3
Violation Net TCK_0 is broken into 2 sub-nets. Routed To 0.00%
Subnet : U2-57
Subnet : JP1-7
Violation Net REST_0 is broken into 5 sub-nets. Routed To 0.00%
Subnet : D1-1
Subnet : C1-2
Subnet : JP1-11
Subnet : R3-1
Subnet : U2-58
Violation Net P63_0 is broken into 2 sub-nets. Routed To 0.00%
Subnet : J1-4
Subnet : U2-2
Violation Net P53_0 is broken into 3 sub-nets. Routed To 0.00%
Subnet : R10-1
Subnet : U2-47
Subnet : U4-6