|
帖子主题 |
回复 |
人气 |
|
High-Performance DDR2 SDRAM In
[Rancho]
|
0 |
2035 |
|
|
The purpose of this white pape
[Rancho]
|
0 |
1662 |
|
|
Virtex 器件中的多个 CAM 设计概述
[Rancho]
|
0 |
1517 |
|
|
Parameterizable LocalLink FIFO
[Rancho]
|
0 |
1749 |
|
|
Self-Addressing FIFO
[Rancho]
|
0 |
1414 |
|
|
FIFOs Using Virtex-II Block RA
[Rancho]
|
0 |
1768 |
|
|
FIFOs Using Virtex-II Shift Re
[Rancho]
|
0 |
1712 |
|
|
Serial-to-Parallel Converter -
[Rancho]
|
0 |
1652 |
|
|
170 MHz FIFOs Using the Virtex
[Rancho]
|
0 |
1645 |
|
|
FIFO Generator v2.2
[Rancho]
|
0 |
1650 |
|
|
利用 EMIF 接口 Xilinx FPGA 和 TI DS
[Rancho]
|
0 |
1532 |
|
|
使用DSP48 DDR 技术的Alpha Blending
[Rancho]
|
0 |
1636 |
|
|
Forward Error Correction on IT
[Rancho]
|
0 |
1412 |
|
|
A 3/4/5/6X Oversampling Circui
[Rancho]
|
0 |
1666 |
|
|
Viterbi Decoder Block Decoding
[Rancho]
|
0 |
1531 |
|
|
数字电视广播系统内的前向纠错
[Rancho]
|
0 |
1473 |
|
|
使用 Spartan-II 的 Reed-Solomon 解
[Rancho]
|
0 |
1466 |
|
|
Virtex-4 FX 器件中的浮点单元 (FPU) 与 P
[Rancho]
|
0 |
1711 |
|
|
Designing Efficient Digital Up
[Rancho]
|
0 |
1686 |
|
|
Decreasing Simulation Runtimes
[Rancho]
|
0 |
1556 |
|
|
Using System Generator for Sys
[Rancho]
|
0 |
1846 |
|
|
M2C-加速器简化了基于模型的设计
[Rancho]
|
0 |
1847 |
|
|
AccelDSP IP 浏览器
[Rancho]
|
0 |
1610 |
|
|
针对 DSP 使用 MATLAB 为系统生成器创建 IP
[Rancho]
|
0 |
1566 |
|
|
AccelDSP 综合工具支持 MATLAB 结构和功能
[Rancho]
|
0 |
1624 |
|
|
rtex 器件中的多个 CAM 设计概述
[Rancho]
|
0 |
1457 |
|
|
Parameterizable 8b/10b Decoder
[Rancho]
|
0 |
1544 |
|
|
Manchester Encoder-Decoder for
[Rancho]
|
0 |
2547 |
|
|
利用 CoolRunner-II CPLD 设计 16b/2
[Rancho]
|
0 |
1626 |