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【应用手册】AN 522: Implementing Bus LVDS Interface in Supported Altera Device Familie 【FPGA/CPLD】
bobgeng|浏览：2121|回复：0| bobgeng 2012-05-14 10:13:08
【应用手册】High Definition (HD) Video Monitoring Reference Design(Milestone 4) 【FPGA/CPLD】
bobgeng|浏览：1666|回复：0| bobgeng 2012-05-14 10:04:17
【应用手册】AN 526: 3GPP UMTS Turbo Reference Design 【FPGA/CPLD】
bobgeng|浏览：2004|回复：0| bobgeng 2012-05-14 09:53:54
【应用手册】AN536: Design Guidelines for Preparing HardCopy II ASICs 【FPGA/CPLD】
bobgeng|浏览：1703|回复：0| bobgeng 2012-05-14 09:48:26
【应用手册】AN 537: Implementing UNH-IOL Test Suite Compliance in Arria GX and Stratix 【FPGA/CPLD】
bobgeng|浏览：2169|回复：0| bobgeng 2012-05-14 09:44:30
【应用手册】AN 541: SerialLite II Hardware Debugging Guide 【FPGA/CPLD】
bobgeng|浏览：2056|回复：0| bobgeng 2012-05-14 09:40:50
【应用手册】AN 542: High Definition (HD) Video Monitoring Reference Design (M5) 【FPGA/CPLD】
bobgeng|浏览：1817|回复：0| bobgeng 2012-05-14 09:35:11
【应用手册】AN 545: Design Guidelines and Timing Closure Techniques for HardCopy ASICs 【FPGA/CPLD】
bobgeng|浏览：1799|回复：0| bobgeng 2012-05-14 09:27:18
【应用手册】AN 544: Digital IF Modem Design with the DSP Builder Advanced Blockset 【FPGA/CPLD】
bobgeng|浏览：2124|回复：0| bobgeng 2012-05-12 21:50:12
【应用手册】AN 547: Putting the MAX II CPLD in Hibernation Mode to Achieve Zero Standb 【FPGA/CPLD】
bobgeng|浏览：1776|回复：0| bobgeng 2012-05-12 21:38:54
【应用手册】AN 550: Using the DLL Phase Offset Feature in Stratix FPGAs and HardCopy A 【FPGA/CPLD】
bobgeng|浏览：1695|回复：0| bobgeng 2012-05-12 21:20:08
【应用手册】AN 551: SDI-ASI Auto Detect Reference Design for Stratix II GX Devices 【FPGA/CPLD】
bobgeng|浏览：2546|回复：0| bobgeng 2012-05-12 18:04:35
【应用手册】AN 553: Debugging Transceivers 【FPGA/CPLD】
bobgeng|浏览：1646|回复：0| bobgeng 2012-05-12 18:01:10
【应用手册】AN 554: How to Read HardCopy PrimeTime Timing Reports 【FPGA/CPLD】
bobgeng|浏览：1841|回复：0| bobgeng 2012-05-12 17:57:25
【应用手册】AN 559: High Definition (HD) Video Reference Design (V1) 【FPGA/CPLD】
bobgeng|浏览：1595|回复：0| bobgeng 2012-05-12 17:54:07
【应用手册】AN 570: Implementing the 40G/100G Ethernet Protocol in Stratix IV Devices 【FPGA/CPLD】
bobgeng|浏览：1654|回复：0| bobgeng 2012-05-12 17:51:33
【应用手册】AN 571: Implementing the SERDES Framer Interface Level 5 (SFI-5.1) Protoco 【FPGA/CPLD】
bobgeng|浏览：2051|回复：0| bobgeng 2012-05-12 17:47:59
【应用手册】AN 572: Implementing the Scalable SERDES Framer Interface (SFI-S) Protocol 【FPGA/CPLD】
bobgeng|浏览：1663|回复：0| bobgeng 2012-05-12 17:44:07
【应用手册】AN 573: Implementing the Interlaken Protocol in Stratix IV Transceivers 【FPGA/CPLD】
bobgeng|浏览：1848|回复：0| bobgeng 2012-05-12 17:40:28
【应用手册】Recommended Protocol Configurations for Stratix IV GX FPGAs 【FPGA/CPLD】
bobgeng|浏览：1598|回复：0| bobgeng 2012-05-12 17:37:03
【应用手册】AN 578: Manual Placement of CMU PLLs and ATX PLLs in Stratix IV GX and GT 【FPGA/CPLD】
bobgeng|浏览：1669|回复：0| bobgeng 2012-05-12 17:32:10
【应用手册】Achieving Timing Closure in Basic (PMA Direct) Functional Mode 【FPGA/CPLD】
bobgeng|浏览：2004|回复：0| bobgeng 2012-05-12 17:26:52
【应用手册】AN 584: Timing Closure Methodology for Advanced FPGA Designs 【FPGA/CPLD】
bobgeng|浏览：1771|回复：0| bobgeng 2012-05-12 17:23:57
【应用手册】AN 588: 10-Gbps Ethernet Hardware Demonstration Reference Designs 【FPGA/CPLD】
bobgeng|浏览：2605|回复：0| bobgeng 2012-05-12 17:18:47
【应用手册】AN 589: Using the Design Security Feature in Cyclone III LS Devices 【FPGA/CPLD】
bobgeng|浏览：1948|回复：0| bobgeng 2012-05-12 17:14:27
【应用手册】AN 593: Anti-Tamper Protection for Cyclone III LS Devices 【FPGA/CPLD】
bobgeng|浏览：1854|回复：0| bobgeng 2012-05-12 17:09:07
【应用手册】AN595: Vectored Interrupt Controller Usage and Applications 【FPGA/CPLD】
bobgeng|浏览：1587|回复：0| bobgeng 2012-05-12 17:01:09
【应用手册】AN 596: Modeling and Design Considerations for 10 Gbps Connectors 【FPGA/CPLD】
bobgeng|浏览：1755|回复：0| bobgeng 2012-05-12 11:33:01
【应用手册】AN 597: Getting Started Flow for Board Designs 【FPGA/CPLD】
bobgeng|浏览：1619|回复：0| bobgeng 2012-05-12 11:26:44
【应用手册】AN 603: Active Serial Remote System Upgrade Reference Design 【FPGA/CPLD】
bobgeng|浏览：2651|回复：0| bobgeng 2012-05-12 11:21:53
【应用手册】 AN 606: POS-PHY Level 4 (SPI-4.2) Loopback Reference Design 【FPGA/CPLD】
bobgeng|浏览：2582|回复：0| bobgeng 2012-05-12 11:14:14
【应用手册】Dynamic Reconfiguration of Transceiver Channels Using Multiple PLLs in Str 【FPGA/CPLD】
bobgeng|浏览：1974|回复：0| bobgeng 2012-05-12 11:10:36
DDR中地址信号和数据信号是个什么时序关系？ 【FPGA/CPLD】
happysheep|浏览：3715|回复：3| antonine 2012-05-06 18:49:19
内存申请问题 【DSP系统】
breeze505|浏览：2351|回复：2| antonine 2012-05-05 00:14:02
【应用手册】AN 608: HST Jitter and BER Estimator Tool for Stratix IV GX and GT Devices 【FPGA/CPLD】
bobgeng|浏览：1977|回复：0| bobgeng 2012-04-30 19:17:55
【应用手册】AN 610: Implementing Deterministic Latency for CPRI and OBSAI Protocols in 【FPGA/CPLD】
bobgeng|浏览：1948|回复：0| bobgeng 2012-04-30 19:14:37
【应用手册】PCB Stackup Design Considerations for Altera FPGAs 【FPGA/CPLD】
bobgeng|浏览：2211|回复：0| bobgeng 2012-04-30 19:11:20
【应用手册】Implementing Loopback in Triple-Speed Ethernet Designs With LVDS I/O and G 【FPGA/CPLD】
bobgeng|浏览：1999|回复：0| bobgeng 2012-04-30 19:09:00
【应用手册】Implementing SATA and SAS Protocols in Altera Devices 【FPGA/CPLD】
bobgeng|浏览：2005|回复：0| bobgeng 2012-04-30 19:05:54
【应用手册】Sharing External Memory Bandwidth Using the Multi-Port Front-End Reference 【FPGA/CPLD】
bobgeng|浏览：1902|回复：0| bobgeng 2012-04-30 19:02:56
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